diff --git a/c/Makefile b/c/Makefile new file mode 100755 index 0000000..4243940 --- /dev/null +++ b/c/Makefile @@ -0,0 +1,32 @@ +# My pic workflow makefile by Fernando R Jacobo +# Dependencies +# SDCC Small Device C Compiler +# pk2cmd for pickit pic programmers + +# C compiler variables +SRC=*.c +CC=sdcc +FAMILY=pic16 +PROC=18f4550 + +# ASM and program variables +PPROC=PIC18F4550 +ASMPROC=18F4550 + +all: $(SRC:.c=.hex) + +comp: $(SRC) + $(CC) --use-non-free -m$(FAMILY) -p$(PROC) $^ + +clean: + rm -f $(SRC:.c=.asm) $(SRC:.c=.cod) $(SRC:.c=.hex) $(SRC:.c=.lst) $(SRC:.c=.o) + +program: + pk2cmd -M -P${PPROC} -Fmain.hex + +asm: *.asm + gpasm -p ${ASMPROC} -o main.hex $^ + +asmp: asm program + +.PHONY: all clean diff --git a/c/README.md b/c/README.md new file mode 100755 index 0000000..c419b39 --- /dev/null +++ b/c/README.md @@ -0,0 +1 @@ +# PIC18F4550 examples with SDCC C diff --git a/c/blinkc/Makefile b/c/blinkc/Makefile new file mode 100755 index 0000000..4243940 --- /dev/null +++ b/c/blinkc/Makefile @@ -0,0 +1,32 @@ +# My pic workflow makefile by Fernando R Jacobo +# Dependencies +# SDCC Small Device C Compiler +# pk2cmd for pickit pic programmers + +# C compiler variables +SRC=*.c +CC=sdcc +FAMILY=pic16 +PROC=18f4550 + +# ASM and program variables +PPROC=PIC18F4550 +ASMPROC=18F4550 + +all: $(SRC:.c=.hex) + +comp: $(SRC) + $(CC) --use-non-free -m$(FAMILY) -p$(PROC) $^ + +clean: + rm -f $(SRC:.c=.asm) $(SRC:.c=.cod) $(SRC:.c=.hex) $(SRC:.c=.lst) $(SRC:.c=.o) + +program: + pk2cmd -M -P${PPROC} -Fmain.hex + +asm: *.asm + gpasm -p ${ASMPROC} -o main.hex $^ + +asmp: asm program + +.PHONY: all clean diff --git a/c/blinkc/main.asm b/c/blinkc/main.asm new file mode 100755 index 0000000..02d0370 --- /dev/null +++ b/c/blinkc/main.asm @@ -0,0 +1,342 @@ +;-------------------------------------------------------- +; File Created by SDCC : free open source ISO C Compiler +; Version 4.5.0 #15242 (Linux) +;-------------------------------------------------------- +; PIC16 port for the Microchip 16-bit core micros +;-------------------------------------------------------- + list p=18f4550 + radix dec + CONFIG XINST=OFF + CONFIG FOSC=HS + CONFIG WDT=OFF + CONFIG LVP=OFF + + +;-------------------------------------------------------- +; public variables in this module +;-------------------------------------------------------- + global _sram_end + global _main + +;-------------------------------------------------------- +; extern variables in this module +;-------------------------------------------------------- + extern _SPPCFGbits + extern _SPPEPSbits + extern _SPPCONbits + extern _UFRMLbits + extern _UFRMHbits + extern _UIRbits + extern _UIEbits + extern _UEIRbits + extern _UEIEbits + extern _USTATbits + extern _UCONbits + extern _UADDRbits + extern _UCFGbits + extern _UEP0bits + extern _UEP1bits + extern _UEP2bits + extern _UEP3bits + extern _UEP4bits + extern _UEP5bits + extern _UEP6bits + extern _UEP7bits + extern _UEP8bits + extern _UEP9bits + extern _UEP10bits + extern _UEP11bits + extern _UEP12bits + extern _UEP13bits + extern _UEP14bits + extern _UEP15bits + extern _PORTAbits + extern _PORTBbits + extern _PORTCbits + extern _PORTDbits + extern _PORTEbits + extern _LATAbits + extern _LATBbits + extern _LATCbits + extern _LATDbits + extern _LATEbits + extern _DDRAbits + extern _TRISAbits + extern _DDRBbits + extern _TRISBbits + extern _DDRCbits + extern _TRISCbits + extern _DDRDbits + extern _TRISDbits + extern _DDREbits + extern _TRISEbits + extern _OSCTUNEbits + extern _PIE1bits + extern _PIR1bits + extern _IPR1bits + extern _PIE2bits + extern _PIR2bits + extern _IPR2bits + extern _EECON1bits + extern _RCSTAbits + extern _TXSTAbits + extern _T3CONbits + extern _CMCONbits + extern _CVRCONbits + extern _CCP1ASbits + extern _ECCP1ASbits + extern _CCP1DELbits + extern _ECCP1DELbits + extern _BAUDCONbits + extern _BAUDCTLbits + extern _CCP2CONbits + extern _CCP1CONbits + extern _ECCP1CONbits + extern _ADCON2bits + extern _ADCON1bits + extern _ADCON0bits + extern _SSPCON2bits + extern _SSPCON1bits + extern _SSPSTATbits + extern _T2CONbits + extern _T1CONbits + extern _RCONbits + extern _WDTCONbits + extern _HLVDCONbits + extern _LVDCONbits + extern _OSCCONbits + extern _T0CONbits + extern _STATUSbits + extern _INTCON3bits + extern _INTCON2bits + extern _INTCONbits + extern _STKPTRbits + extern _SPPDATA + extern _SPPCFG + extern _SPPEPS + extern _SPPCON + extern _UFRM + extern _UFRML + extern _UFRMH + extern _UIR + extern _UIE + extern _UEIR + extern _UEIE + extern _USTAT + extern _UCON + extern _UADDR + extern _UCFG + extern _UEP0 + extern _UEP1 + extern _UEP2 + extern _UEP3 + extern _UEP4 + extern _UEP5 + extern _UEP6 + extern _UEP7 + extern _UEP8 + extern _UEP9 + extern _UEP10 + extern _UEP11 + extern _UEP12 + extern _UEP13 + extern _UEP14 + extern _UEP15 + extern _PORTA + extern _PORTB + extern _PORTC + extern _PORTD + extern _PORTE + extern _LATA + extern _LATB + extern _LATC + extern _LATD + extern _LATE + extern _DDRA + extern _TRISA + extern _DDRB + extern _TRISB + extern _DDRC + extern _TRISC + extern _DDRD + extern _TRISD + extern _DDRE + extern _TRISE + extern _OSCTUNE + extern _PIE1 + extern _PIR1 + extern _IPR1 + extern _PIE2 + extern _PIR2 + extern _IPR2 + extern _EECON1 + extern _EECON2 + extern _EEDATA + extern _EEADR + extern _RCSTA + extern _TXSTA + extern _TXREG + extern _RCREG + extern _SPBRG + extern _SPBRGH + extern _T3CON + extern _TMR3 + extern _TMR3L + extern _TMR3H + extern _CMCON + extern _CVRCON + extern _CCP1AS + extern _ECCP1AS + extern _CCP1DEL + extern _ECCP1DEL + extern _BAUDCON + extern _BAUDCTL + extern _CCP2CON + extern _CCPR2 + extern _CCPR2L + extern _CCPR2H + extern _CCP1CON + extern _ECCP1CON + extern _CCPR1 + extern _CCPR1L + extern _CCPR1H + extern _ADCON2 + extern _ADCON1 + extern _ADCON0 + extern _ADRES + extern _ADRESL + extern _ADRESH + extern _SSPCON2 + extern _SSPCON1 + extern _SSPSTAT + extern _SSPADD + extern _SSPBUF + extern _T2CON + extern _PR2 + extern _TMR2 + extern _T1CON + extern _TMR1 + extern _TMR1L + extern _TMR1H + extern _RCON + extern _WDTCON + extern _HLVDCON + extern _LVDCON + extern _OSCCON + extern _T0CON + extern _TMR0 + extern _TMR0L + extern _TMR0H + extern _STATUS + extern _FSR2L + extern _FSR2H + extern _PLUSW2 + extern _PREINC2 + extern _POSTDEC2 + extern _POSTINC2 + extern _INDF2 + extern _BSR + extern _FSR1L + extern _FSR1H + extern _PLUSW1 + extern _PREINC1 + extern _POSTDEC1 + extern _POSTINC1 + extern _INDF1 + extern _WREG + extern _FSR0L + extern _FSR0H + extern _PLUSW0 + extern _PREINC0 + extern _POSTDEC0 + extern _POSTINC0 + extern _INDF0 + extern _INTCON3 + extern _INTCON2 + extern _INTCON + extern _PROD + extern _PRODL + extern _PRODH + extern _TABLAT + extern _TBLPTR + extern _TBLPTRL + extern _TBLPTRH + extern _TBLPTRU + extern _PC + extern _PCL + extern _PCLATH + extern _PCLATU + extern _STKPTR + extern _TOS + extern _TOSL + extern _TOSH + extern _TOSU + extern _delay1ktcy + +;-------------------------------------------------------- +; Equates to used internal registers +;-------------------------------------------------------- +STATUS equ 0xfd8 +WREG equ 0xfe8 +PRODH equ 0xff4 + + +; Internal registers +.registers udata_ovr 0x0000 +r0x00 res 1 + + +ustat_main_00 udata 0X07FF +_sram_end res 0 + +;-------------------------------------------------------- +; interrupt vector +;-------------------------------------------------------- + +;-------------------------------------------------------- +; global & static initialisations +;-------------------------------------------------------- +; I code from now on! +; ; Starting pCode block +S_main__main code +_main: +; .line 16; main.c LED_TRIS = 0; // Pin as output + BCF _TRISDbits, 1 +; .line 17; main.c LED_LAT = 0; // LED off + BCF _LATDbits, 1 +_00106_DS_: +; .line 20; main.c LED_LAT = !LED_LAT; // Toggle LED + CLRF r0x00 + BTFSC _LATDbits, 1 + INCF r0x00, F + MOVF r0x00, W + BSF STATUS, 0 + TSTFSZ WREG + BCF STATUS, 0 + CLRF r0x00 + RLCF r0x00, F + MOVF r0x00, W + ANDLW 0x01 + RLNCF WREG, W + MOVWF PRODH + MOVF _LATDbits, W + ANDLW 0xfd + IORWF PRODH, W + MOVWF _LATDbits +; .line 21; main.c delay1ktcy(500); // 500ms @ 1MHz + MOVLW 0xf4 + CALL _delay1ktcy + BRA _00106_DS_ +; .line 23; main.c } + RETURN + + + +; Statistics: +; code size: 48 (0x0030) bytes ( 0.04%) +; 24 (0x0018) words +; udata size: 0 (0x0000) bytes ( 0.00%) +; access size: 1 (0x0001) bytes + + + end diff --git a/c/blinkc/main.c b/c/blinkc/main.c new file mode 100755 index 0000000..fb035d0 --- /dev/null +++ b/c/blinkc/main.c @@ -0,0 +1,23 @@ +#include +#include + +// FUSES START +#pragma config XINST = OFF +#pragma config FOSC = HS +#pragma config WDT = OFF +#pragma config LVP = OFF + +// FUSES END + +#define LED_LAT LATDbits.LATD1 +#define LED_TRIS TRISDbits.TRISD1 + +void main(void) { + LED_TRIS = 0; // Pin as output + LED_LAT = 0; // LED off + + while (1) { + LED_LAT = !LED_LAT; // Toggle LED + delay1ktcy(500); // 500ms @ 1MHz + } +} diff --git a/c/blinkc/main.hex b/c/blinkc/main.hex new file mode 100755 index 0000000..21b082b --- /dev/null +++ b/c/blinkc/main.hex @@ -0,0 +1,25 @@ +:020000040000FA +:1000000002EF00F011EEFFF021EEFFF0F86AA68E8D +:10001000A69C07EEFFF00068ED6A0050FDE11C0EA3 +:10002000F66E010EF76E000EF86E0900F5CF05F0C2 +:100030000900F5CF06F034D00900F5CF00F0090033 +:10004000F5CF01F00900F5CF02F009000900F5CF66 +:10005000E9FF0900F5CFEAFF090009000900F5CF23 +:1000600003F00900F5CF04F009000900F6CF07F00E +:10007000F7CF08F0F8CF09F000C0F6FF01C0F7FF96 +:1000800002C0F8FF03D00900F5CFEEFF0306FBE244 +:100090000406F9E207C0F6FF08C0F7FF09C0F8FF41 +:1000A0000506CAE20606C8E276EC00F0FFD7E806CD +:1000B000E56E630E6AEC00F0E4500BE000D0E56EF4 +:1000C000630E6AEC00F000D000D00000E450E82E8F +:1000D000F6D71200E8060000E85007E000D000D094 +:1000E00000D000D00000E82EFAD7120095928C9232 +:1000F000006A8CB2002A0050D880E866D890006A66 +:1001000000360050010BE844F46E8C50FD0BF410E7 +:100110008C6EF40E57EC00F0EBD7120001002A01B0 +:0C01200000006000000001000000000072 +:020000040030CA +:010001000CF2 +:010003001EDE +:010006008178 +:00000001FF diff --git a/c/blinkc/main.o b/c/blinkc/main.o new file mode 100755 index 0000000..1f9b228 Binary files /dev/null and b/c/blinkc/main.o differ diff --git a/c/cuentac/Makefile b/c/cuentac/Makefile new file mode 100755 index 0000000..4243940 --- /dev/null +++ b/c/cuentac/Makefile @@ -0,0 +1,32 @@ +# My pic workflow makefile by Fernando R Jacobo +# Dependencies +# SDCC Small Device C Compiler +# pk2cmd for pickit pic programmers + +# C compiler variables +SRC=*.c +CC=sdcc +FAMILY=pic16 +PROC=18f4550 + +# ASM and program variables +PPROC=PIC18F4550 +ASMPROC=18F4550 + +all: $(SRC:.c=.hex) + +comp: $(SRC) + $(CC) --use-non-free -m$(FAMILY) -p$(PROC) $^ + +clean: + rm -f $(SRC:.c=.asm) $(SRC:.c=.cod) $(SRC:.c=.hex) $(SRC:.c=.lst) $(SRC:.c=.o) + +program: + pk2cmd -M -P${PPROC} -Fmain.hex + +asm: *.asm + gpasm -p ${ASMPROC} -o main.hex $^ + +asmp: asm program + +.PHONY: all clean diff --git a/c/cuentac/main.asm b/c/cuentac/main.asm new file mode 100755 index 0000000..80ca08d --- /dev/null +++ b/c/cuentac/main.asm @@ -0,0 +1,472 @@ +;-------------------------------------------------------- +; File Created by SDCC : free open source ISO C Compiler +; Version 4.5.0 #15242 (Linux) +;-------------------------------------------------------- +; PIC16 port for the Microchip 16-bit core micros +;-------------------------------------------------------- + list p=18f4550 + radix dec + CONFIG XINST=OFF + CONFIG FOSC=HS + CONFIG WDT=OFF + CONFIG LVP=OFF + CONFIG MCLRE=OFF + + +;-------------------------------------------------------- +; public variables in this module +;-------------------------------------------------------- + global _sram_end + global _number_to_7seg + global _main + +;-------------------------------------------------------- +; extern variables in this module +;-------------------------------------------------------- + extern _SPPCFGbits + extern _SPPEPSbits + extern _SPPCONbits + extern _UFRMLbits + extern _UFRMHbits + extern _UIRbits + extern _UIEbits + extern _UEIRbits + extern _UEIEbits + extern _USTATbits + extern _UCONbits + extern _UADDRbits + extern _UCFGbits + extern _UEP0bits + extern _UEP1bits + extern _UEP2bits + extern _UEP3bits + extern _UEP4bits + extern _UEP5bits + extern _UEP6bits + extern _UEP7bits + extern _UEP8bits + extern _UEP9bits + extern _UEP10bits + extern _UEP11bits + extern _UEP12bits + extern _UEP13bits + extern _UEP14bits + extern _UEP15bits + extern _PORTAbits + extern _PORTBbits + extern _PORTCbits + extern _PORTDbits + extern _PORTEbits + extern _LATAbits + extern _LATBbits + extern _LATCbits + extern _LATDbits + extern _LATEbits + extern _DDRAbits + extern _TRISAbits + extern _DDRBbits + extern _TRISBbits + extern _DDRCbits + extern _TRISCbits + extern _DDRDbits + extern _TRISDbits + extern _DDREbits + extern _TRISEbits + extern _OSCTUNEbits + extern _PIE1bits + extern _PIR1bits + extern _IPR1bits + extern _PIE2bits + extern _PIR2bits + extern _IPR2bits + extern _EECON1bits + extern _RCSTAbits + extern _TXSTAbits + extern _T3CONbits + extern _CMCONbits + extern _CVRCONbits + extern _CCP1ASbits + extern _ECCP1ASbits + extern _CCP1DELbits + extern _ECCP1DELbits + extern _BAUDCONbits + extern _BAUDCTLbits + extern _CCP2CONbits + extern _CCP1CONbits + extern _ECCP1CONbits + extern _ADCON2bits + extern _ADCON1bits + extern _ADCON0bits + extern _SSPCON2bits + extern _SSPCON1bits + extern _SSPSTATbits + extern _T2CONbits + extern _T1CONbits + extern _RCONbits + extern _WDTCONbits + extern _HLVDCONbits + extern _LVDCONbits + extern _OSCCONbits + extern _T0CONbits + extern _STATUSbits + extern _INTCON3bits + extern _INTCON2bits + extern _INTCONbits + extern _STKPTRbits + extern _SPPDATA + extern _SPPCFG + extern _SPPEPS + extern _SPPCON + extern _UFRM + extern _UFRML + extern _UFRMH + extern _UIR + extern _UIE + extern _UEIR + extern _UEIE + extern _USTAT + extern _UCON + extern _UADDR + extern _UCFG + extern _UEP0 + extern _UEP1 + extern _UEP2 + extern _UEP3 + extern _UEP4 + extern _UEP5 + extern _UEP6 + extern _UEP7 + extern _UEP8 + extern _UEP9 + extern _UEP10 + extern _UEP11 + extern _UEP12 + extern _UEP13 + extern _UEP14 + extern _UEP15 + extern _PORTA + extern _PORTB + extern _PORTC + extern _PORTD + extern _PORTE + extern _LATA + extern _LATB + extern _LATC + extern _LATD + extern _LATE + extern _DDRA + extern _TRISA + extern _DDRB + extern _TRISB + extern _DDRC + extern _TRISC + extern _DDRD + extern _TRISD + extern _DDRE + extern _TRISE + extern _OSCTUNE + extern _PIE1 + extern _PIR1 + extern _IPR1 + extern _PIE2 + extern _PIR2 + extern _IPR2 + extern _EECON1 + extern _EECON2 + extern _EEDATA + extern _EEADR + extern _RCSTA + extern _TXSTA + extern _TXREG + extern _RCREG + extern _SPBRG + extern _SPBRGH + extern _T3CON + extern _TMR3 + extern _TMR3L + extern _TMR3H + extern _CMCON + extern _CVRCON + extern _CCP1AS + extern _ECCP1AS + extern _CCP1DEL + extern _ECCP1DEL + extern _BAUDCON + extern _BAUDCTL + extern _CCP2CON + extern _CCPR2 + extern _CCPR2L + extern _CCPR2H + extern _CCP1CON + extern _ECCP1CON + extern _CCPR1 + extern _CCPR1L + extern _CCPR1H + extern _ADCON2 + extern _ADCON1 + extern _ADCON0 + extern _ADRES + extern _ADRESL + extern _ADRESH + extern _SSPCON2 + extern _SSPCON1 + extern _SSPSTAT + extern _SSPADD + extern _SSPBUF + extern _T2CON + extern _PR2 + extern _TMR2 + extern _T1CON + extern _TMR1 + extern _TMR1L + extern _TMR1H + extern _RCON + extern _WDTCON + extern _HLVDCON + extern _LVDCON + extern _OSCCON + extern _T0CON + extern _TMR0 + extern _TMR0L + extern _TMR0H + extern _STATUS + extern _FSR2L + extern _FSR2H + extern _PLUSW2 + extern _PREINC2 + extern _POSTDEC2 + extern _POSTINC2 + extern _INDF2 + extern _BSR + extern _FSR1L + extern _FSR1H + extern _PLUSW1 + extern _PREINC1 + extern _POSTDEC1 + extern _POSTINC1 + extern _INDF1 + extern _WREG + extern _FSR0L + extern _FSR0H + extern _PLUSW0 + extern _PREINC0 + extern _POSTDEC0 + extern _POSTINC0 + extern _INDF0 + extern _INTCON3 + extern _INTCON2 + extern _INTCON + extern _PROD + extern _PRODL + extern _PRODH + extern _TABLAT + extern _TBLPTR + extern _TBLPTRL + extern _TBLPTRH + extern _TBLPTRU + extern _PC + extern _PCL + extern _PCLATH + extern _PCLATU + extern _STKPTR + extern _TOS + extern _TOSL + extern _TOSH + extern _TOSU + extern _delay1ktcy + +;-------------------------------------------------------- +; Equates to used internal registers +;-------------------------------------------------------- +STATUS equ 0xfd8 +PCL equ 0xff9 +PCLATH equ 0xffa +PCLATU equ 0xffb +WREG equ 0xfe8 +FSR1L equ 0xfe1 +FSR2L equ 0xfd9 +POSTINC1 equ 0xfe6 +POSTDEC1 equ 0xfe5 +PREINC1 equ 0xfe4 +PLUSW2 equ 0xfdb + + +; Internal registers +.registers udata_ovr 0x0000 +r0x00 res 1 + + +ustat_main_00 udata 0X07FF +_sram_end res 0 + +;-------------------------------------------------------- +; interrupt vector +;-------------------------------------------------------- + +;-------------------------------------------------------- +; global & static initialisations +;-------------------------------------------------------- +; I code from now on! +; ; Starting pCode block +S_main__main code +_main: +; .line 57; main.c TRISD = 0; + CLRF _TRISD +; .line 58; main.c LATD = 0; + CLRF _LATD +; .line 59; main.c TRISE = 0; + CLRF _TRISE +; .line 60; main.c LATE = 0x04; + MOVLW 0x04 + MOVWF _LATE +_00145_DS_: +; .line 63; main.c for (i = 0; i < 15; i++) { + CLRF r0x00 +_00141_DS_: +; .line 64; main.c LATD = number_to_7seg(i); + MOVF r0x00, W + MOVWF POSTDEC1 + CALL _number_to_7seg + MOVWF _LATD + MOVF POSTINC1, F +; .line 65; main.c delay1ktcy(250); // 1s @ 1MHz + MOVLW 0xfa + CALL _delay1ktcy +; .line 63; main.c for (i = 0; i < 15; i++) { + INCF r0x00, F + MOVLW 0x0f + SUBWF r0x00, W + BNC _00141_DS_ + BRA _00145_DS_ +; .line 68; main.c } + RETURN + +; ; Starting pCode block +S_main__number_to_7seg code +_number_to_7seg: +; .line 15; main.c uint8_t number_to_7seg(uint8_t number) { + MOVFF FSR2L, POSTDEC1 + MOVFF FSR1L, FSR2L + MOVFF r0x00, POSTDEC1 + MOVLW 0x02 + MOVFF PLUSW2, r0x00 +; .line 16; main.c switch (number) { + MOVLW 0x10 + SUBWF r0x00, W + BTFSC STATUS, 0 + BRA _00121_DS_ + CLRF PCLATH + CLRF PCLATU + RLCF r0x00, W + RLCF PCLATH, F + RLCF WREG, W + RLCF PCLATH, F + ANDLW 0xfc + ADDLW LOW(_00132_DS_) + MOVWF POSTDEC1 + MOVLW HIGH(_00132_DS_) + ADDWFC PCLATH, F + MOVLW UPPER(_00132_DS_) + ADDWFC PCLATU, F + MOVF PREINC1, W + MOVWF PCL +_00132_DS_: + GOTO _00105_DS_ + GOTO _00106_DS_ + GOTO _00107_DS_ + GOTO _00108_DS_ + GOTO _00109_DS_ + GOTO _00110_DS_ + GOTO _00111_DS_ + GOTO _00112_DS_ + GOTO _00113_DS_ + GOTO _00114_DS_ + GOTO _00115_DS_ + GOTO _00116_DS_ + GOTO _00117_DS_ + GOTO _00118_DS_ + GOTO _00119_DS_ + GOTO _00120_DS_ +_00105_DS_: +; .line 18; main.c return 0x3F; + MOVLW 0x3f + BRA _00123_DS_ +_00106_DS_: +; .line 20; main.c return 0x06; + MOVLW 0x06 + BRA _00123_DS_ +_00107_DS_: +; .line 22; main.c return 0x5B; + MOVLW 0x5b + BRA _00123_DS_ +_00108_DS_: +; .line 24; main.c return 0x4F; + MOVLW 0x4f + BRA _00123_DS_ +_00109_DS_: +; .line 26; main.c return 0x66; + MOVLW 0x66 + BRA _00123_DS_ +_00110_DS_: +; .line 28; main.c return 0x6D; + MOVLW 0x6d + BRA _00123_DS_ +_00111_DS_: +; .line 30; main.c return 0x7D; + MOVLW 0x7d + BRA _00123_DS_ +_00112_DS_: +; .line 32; main.c return 0x07; + MOVLW 0x07 + BRA _00123_DS_ +_00113_DS_: +; .line 34; main.c return 0x7F; + MOVLW 0x7f + BRA _00123_DS_ +_00114_DS_: +; .line 36; main.c return 0x6F; + MOVLW 0x6f + BRA _00123_DS_ +_00115_DS_: +; .line 38; main.c return 0x77; + MOVLW 0x77 + BRA _00123_DS_ +_00116_DS_: +; .line 40; main.c return 0x7c; + MOVLW 0x7c + BRA _00123_DS_ +_00117_DS_: +; .line 42; main.c return 0x39; + MOVLW 0x39 + BRA _00123_DS_ +_00118_DS_: +; .line 44; main.c return 0x5e; + MOVLW 0x5e + BRA _00123_DS_ +_00119_DS_: +; .line 46; main.c return 0x79; + MOVLW 0x79 + BRA _00123_DS_ +_00120_DS_: +; .line 48; main.c return 0x71; + MOVLW 0x71 + BRA _00123_DS_ +_00121_DS_: +; .line 50; main.c return 0; + CLRF WREG +_00123_DS_: +; .line 52; main.c } + MOVFF PREINC1, r0x00 + MOVFF PREINC1, FSR2L + RETURN + + + +; Statistics: +; code size: 238 (0x00ee) bytes ( 0.18%) +; 119 (0x0077) words +; udata size: 0 (0x0000) bytes ( 0.00%) +; access size: 1 (0x0001) bytes + + + end diff --git a/c/cuentac/main.c b/c/cuentac/main.c new file mode 100755 index 0000000..8519423 --- /dev/null +++ b/c/cuentac/main.c @@ -0,0 +1,73 @@ +#include +#include +#include + +/* Configs options */ +#pragma config XINST = OFF /* Extended instruction set */ +#pragma config FOSC = HS /* Internal osc */ +#pragma config WDT = OFF /* Watchdog timer */ +#pragma config LVP = OFF /* Single Supply ICSP OFF */ +#pragma config MCLRE = OFF + +#define LED_LAT LATDbits.LATD1 +#define LED_TRIS TRISDbits.TRISD1 + +uint8_t number_to_7seg(uint8_t number) { + switch (number) { + case 0: + return 0x3F; + case 1: + return 0x06; + case 2: + return 0x5B; + case 3: + return 0x4F; + case 4: + return 0x66; + case 5: + return 0x6D; + case 6: + return 0x7D; + case 7: + return 0x07; + case 8: + return 0x7F; + case 9: + return 0x6F; + case 0xa: + return 0x77; + case 0xb: + return 0x7c; + case 0xC: + return 0x39; + case 0xd: + return 0x5e; + case 0xe: + return 0x79; + case 0xf: + return 0x71; + default: + return 0; + } +} + +void main(void) { + uint8_t i; + + TRISD = 0; + LATD = 0; + TRISE = 0; + LATE = 0x04; + + while (1) { + for (i = 0; i < 15; i++) { + LATD = number_to_7seg(i); + delay1ktcy(250); // 1s @ 1MHz + } + } +} + + +/* NOTES + * Looks like I can treat register like normal variables + */ diff --git a/c/cuentac/main.hex b/c/cuentac/main.hex new file mode 100755 index 0000000..14fe31b --- /dev/null +++ b/c/cuentac/main.hex @@ -0,0 +1,37 @@ +:020000040000FA +:1000000064EF00F0D9CFE5FFE1CFD9FF00C0E5FFF5 +:10001000020EDBCF00F0100E005CD8B04FD0FA6AB1 +:10002000FB6A0034FA36E834FA36FC0B3C0FE56E16 +:10003000000EFA22000EFB22E450F96E3EEF00F0B3 +:1000400040EF00F042EF00F044EF00F046EF00F028 +:1000500048EF00F04AEF00F04CEF00F04EEF00F0F8 +:1000600050EF00F052EF00F054EF00F056EF00F0C8 +:1000700058EF00F05AEF00F05CEF00F03F0E1FD099 +:10008000060E1DD05B0E1BD04F0E19D0660E17D07A +:100090006D0E15D07D0E13D0070E11D07F0E0FD030 +:1000A0006F0E0DD0770E0BD07C0E09D0390E07D015 +:1000B0005E0E05D0790E03D0710E01D0E86AE4CF50 +:1000C00000F0E4CFD9FF120011EEFFF021EEFFF0B7 +:1000D000F86AA68EA69C07EEFFF00068ED6A005055 +:1000E000FDE1DA0EF66E010EF76E000EF86E0900F5 +:1000F000F5CF05F00900F5CF06F034D00900F5CFB3 +:1001000000F00900F5CF01F00900F5CF02F0090079 +:100110000900F5CFE9FF0900F5CFEAFF0900090062 +:100120000900F5CF03F00900F5CF04F0090009003C +:10013000F6CF07F0F7CF08F0F8CF09F000C0F6FFD0 +:1001400001C0F7FF02C0F8FF03D00900F5CFEEFFB2 +:100150000306FBE20406F9E207C0F6FF08C0F7FF5A +:1001600009C0F8FF0506CAE20606C8E2D8EC00F0AE +:10017000FFD7E806E56E630ECCEC00F0E4500BE030 +:1001800000D0E56E630ECCEC00F000D000D0000093 +:10019000E450E82EF6D71200E8060000E85007E029 +:1001A00000D000D000D000D00000E82EFAD7120016 +:1001B000956A8C6A966A040E8D6E006A0050E56E30 +:1001C00002EC00F08C6EE652FA0EB9EC00F0002A58 +:1001D0000F0E005CF3E3F1D712000100E80100000C +:0A01E00060000000010000000000B4 +:020000040030CA +:010001000CF2 +:010003001EDE +:02000500038175 +:00000001FF diff --git a/c/cuentac/main.o b/c/cuentac/main.o new file mode 100755 index 0000000..2b69a1c Binary files /dev/null and b/c/cuentac/main.o differ diff --git a/c/interrupt/main.asm b/c/interrupt/main.asm new file mode 100755 index 0000000..0b00642 --- /dev/null +++ b/c/interrupt/main.asm @@ -0,0 +1,409 @@ +;-------------------------------------------------------- +; File Created by SDCC : free open source ISO C Compiler +; Version 4.5.0 #15242 (Linux) +;-------------------------------------------------------- +; PIC16 port for the Microchip 16-bit core micros +;-------------------------------------------------------- + list p=18f4550 + radix dec + CONFIG XINST=OFF + CONFIG FOSC=HS + CONFIG WDT=OFF + CONFIG LVP=OFF + CONFIG MCLRE=OFF + + +;-------------------------------------------------------- +; public variables in this module +;-------------------------------------------------------- + global _setup + global _isr + global _main + global _sram_end + +;-------------------------------------------------------- +; extern variables in this module +;-------------------------------------------------------- + extern _SPPCFGbits + extern _SPPEPSbits + extern _SPPCONbits + extern _UFRMLbits + extern _UFRMHbits + extern _UIRbits + extern _UIEbits + extern _UEIRbits + extern _UEIEbits + extern _USTATbits + extern _UCONbits + extern _UADDRbits + extern _UCFGbits + extern _UEP0bits + extern _UEP1bits + extern _UEP2bits + extern _UEP3bits + extern _UEP4bits + extern _UEP5bits + extern _UEP6bits + extern _UEP7bits + extern _UEP8bits + extern _UEP9bits + extern _UEP10bits + extern _UEP11bits + extern _UEP12bits + extern _UEP13bits + extern _UEP14bits + extern _UEP15bits + extern _PORTAbits + extern _PORTBbits + extern _PORTCbits + extern _PORTDbits + extern _PORTEbits + extern _LATAbits + extern _LATBbits + extern _LATCbits + extern _LATDbits + extern _LATEbits + extern _DDRAbits + extern _TRISAbits + extern _DDRBbits + extern _TRISBbits + extern _DDRCbits + extern _TRISCbits + extern _DDRDbits + extern _TRISDbits + extern _DDREbits + extern _TRISEbits + extern _OSCTUNEbits + extern _PIE1bits + extern _PIR1bits + extern _IPR1bits + extern _PIE2bits + extern _PIR2bits + extern _IPR2bits + extern _EECON1bits + extern _RCSTAbits + extern _TXSTAbits + extern _T3CONbits + extern _CMCONbits + extern _CVRCONbits + extern _CCP1ASbits + extern _ECCP1ASbits + extern _CCP1DELbits + extern _ECCP1DELbits + extern _BAUDCONbits + extern _BAUDCTLbits + extern _CCP2CONbits + extern _CCP1CONbits + extern _ECCP1CONbits + extern _ADCON2bits + extern _ADCON1bits + extern _ADCON0bits + extern _SSPCON2bits + extern _SSPCON1bits + extern _SSPSTATbits + extern _T2CONbits + extern _T1CONbits + extern _RCONbits + extern _WDTCONbits + extern _HLVDCONbits + extern _LVDCONbits + extern _OSCCONbits + extern _T0CONbits + extern _STATUSbits + extern _INTCON3bits + extern _INTCON2bits + extern _INTCONbits + extern _STKPTRbits + extern _SPPDATA + extern _SPPCFG + extern _SPPEPS + extern _SPPCON + extern _UFRM + extern _UFRML + extern _UFRMH + extern _UIR + extern _UIE + extern _UEIR + extern _UEIE + extern _USTAT + extern _UCON + extern _UADDR + extern _UCFG + extern _UEP0 + extern _UEP1 + extern _UEP2 + extern _UEP3 + extern _UEP4 + extern _UEP5 + extern _UEP6 + extern _UEP7 + extern _UEP8 + extern _UEP9 + extern _UEP10 + extern _UEP11 + extern _UEP12 + extern _UEP13 + extern _UEP14 + extern _UEP15 + extern _PORTA + extern _PORTB + extern _PORTC + extern _PORTD + extern _PORTE + extern _LATA + extern _LATB + extern _LATC + extern _LATD + extern _LATE + extern _DDRA + extern _TRISA + extern _DDRB + extern _TRISB + extern _DDRC + extern _TRISC + extern _DDRD + extern _TRISD + extern _DDRE + extern _TRISE + extern _OSCTUNE + extern _PIE1 + extern _PIR1 + extern _IPR1 + extern _PIE2 + extern _PIR2 + extern _IPR2 + extern _EECON1 + extern _EECON2 + extern _EEDATA + extern _EEADR + extern _RCSTA + extern _TXSTA + extern _TXREG + extern _RCREG + extern _SPBRG + extern _SPBRGH + extern _T3CON + extern _TMR3 + extern _TMR3L + extern _TMR3H + extern _CMCON + extern _CVRCON + extern _CCP1AS + extern _ECCP1AS + extern _CCP1DEL + extern _ECCP1DEL + extern _BAUDCON + extern _BAUDCTL + extern _CCP2CON + extern _CCPR2 + extern _CCPR2L + extern _CCPR2H + extern _CCP1CON + extern _ECCP1CON + extern _CCPR1 + extern _CCPR1L + extern _CCPR1H + extern _ADCON2 + extern _ADCON1 + extern _ADCON0 + extern _ADRES + extern _ADRESL + extern _ADRESH + extern _SSPCON2 + extern _SSPCON1 + extern _SSPSTAT + extern _SSPADD + extern _SSPBUF + extern _T2CON + extern _PR2 + extern _TMR2 + extern _T1CON + extern _TMR1 + extern _TMR1L + extern _TMR1H + extern _RCON + extern _WDTCON + extern _HLVDCON + extern _LVDCON + extern _OSCCON + extern _T0CON + extern _TMR0 + extern _TMR0L + extern _TMR0H + extern _STATUS + extern _FSR2L + extern _FSR2H + extern _PLUSW2 + extern _PREINC2 + extern _POSTDEC2 + extern _POSTINC2 + extern _INDF2 + extern _BSR + extern _FSR1L + extern _FSR1H + extern _PLUSW1 + extern _PREINC1 + extern _POSTDEC1 + extern _POSTINC1 + extern _INDF1 + extern _WREG + extern _FSR0L + extern _FSR0H + extern _PLUSW0 + extern _PREINC0 + extern _POSTDEC0 + extern _POSTINC0 + extern _INDF0 + extern _INTCON3 + extern _INTCON2 + extern _INTCON + extern _PROD + extern _PRODL + extern _PRODH + extern _TABLAT + extern _TBLPTR + extern _TBLPTRL + extern _TBLPTRH + extern _TBLPTRU + extern _PC + extern _PCL + extern _PCLATH + extern _PCLATU + extern _STKPTR + extern _TOS + extern _TOSL + extern _TOSH + extern _TOSU + extern _delay1ktcy + +;-------------------------------------------------------- +; Equates to used internal registers +;-------------------------------------------------------- +STATUS equ 0xfd8 +PCLATH equ 0xffa +PCLATU equ 0xffb +BSR equ 0xfe0 +FSR0L equ 0xfe9 +FSR0H equ 0xfea +FSR1L equ 0xfe1 +FSR2L equ 0xfd9 +POSTDEC1 equ 0xfe5 +PREINC1 equ 0xfe4 +PRODL equ 0xff3 +PRODH equ 0xff4 + + +ustat_main_00 udata 0X07FF +_sram_end res 0 + +;-------------------------------------------------------- +; interrupt vector +;-------------------------------------------------------- + +;-------------------------------------------------------- +; global & static initialisations +;-------------------------------------------------------- +; ; Starting pCode block for absolute section +; ;----------------------------------------- +S_main_ivec_0x1_isr code 0X000008 +ivec_0x1_isr: + GOTO _isr + +; I code from now on! +; ; Starting pCode block +S_main__main code +_main: +; .line 45; main.c setup(); + CALL _setup +_00119_DS_: + BRA _00119_DS_ +; .line 50; main.c } + RETURN + +; ; Starting pCode block +S_main__isr code +_isr: +; .line 33; main.c void isr(void) __interrupt (1) { + MOVFF STATUS, POSTDEC1 + MOVFF BSR, POSTDEC1 + MOVWF POSTDEC1 + MOVFF PRODL, POSTDEC1 + MOVFF PRODH, POSTDEC1 + MOVFF FSR0L, POSTDEC1 + MOVFF FSR0H, POSTDEC1 + MOVFF PCLATH, POSTDEC1 + MOVFF PCLATU, POSTDEC1 + MOVFF FSR2L, POSTDEC1 + MOVFF FSR1L, FSR2L +; .line 34; main.c if (INTCONbits.RBIF) { + BTFSS _INTCONbits, 0 + BRA _00111_DS_ +; .line 36; main.c WREG = PORTB; + MOVF _PORTB, W +; .line 37; main.c LATD = ~LATD; + COMF _LATD, F +; .line 38; main.c delay1ktcy(250); + MOVLW 0xfa + CALL _delay1ktcy +_00111_DS_: +; .line 41; main.c INTCONbits.RBIF = 0; + BCF _INTCONbits, 0 +; .line 42; main.c } + MOVFF PREINC1, FSR2L + MOVFF PREINC1, PCLATU + MOVFF PREINC1, PCLATH + MOVFF PREINC1, FSR0H + MOVFF PREINC1, FSR0L + MOVFF PREINC1, PRODH + MOVFF PREINC1, PRODL + MOVF PREINC1, W + MOVFF PREINC1, BSR + MOVFF PREINC1, STATUS + RETFIE + +; ; Starting pCode block +S_main__setup code +_setup: +; .line 15; main.c void setup(void){ + MOVFF FSR2L, POSTDEC1 + MOVFF FSR1L, FSR2L +; .line 16; main.c LATD = 0; + CLRF _LATD +; .line 17; main.c TRISD = 0; + CLRF _TRISD +; .line 19; main.c TRISB = 0xff; + MOVLW 0xff + MOVWF _TRISB +; .line 20; main.c LATB = 0x00; + CLRF _LATB +; .line 21; main.c ADCON1 = 0xf; + MOVLW 0x0f + MOVWF _ADCON1 +; .line 23; main.c INTCONbits.GIE = 1; + BSF _INTCONbits, 7 +; .line 24; main.c INTCONbits.PEIE = 1; + BSF _INTCONbits, 6 +; .line 25; main.c INTCONbits.RBIE = 1; + BSF _INTCONbits, 3 +; .line 26; main.c INTCON2bits.RBPU = 0; + BCF _INTCON2bits, 7 +; .line 27; main.c INTCON2bits.RBIP = 1; + BSF _INTCON2bits, 0 +; .line 28; main.c RCONbits.IPEN = 1; + BSF _RCONbits, 7 +; .line 30; main.c INTCONbits.INT0IE = 1; + BSF _INTCONbits, 4 +; .line 31; main.c } + MOVFF PREINC1, FSR2L + RETURN + + + +; Statistics: +; code size: 150 (0x0096) bytes ( 0.11%) +; 75 (0x004b) words +; udata size: 0 (0x0000) bytes ( 0.00%) +; access size: 0 (0x0000) bytes + + + end diff --git a/c/interrupt/main.c b/c/interrupt/main.c new file mode 100755 index 0000000..8c603c8 --- /dev/null +++ b/c/interrupt/main.c @@ -0,0 +1,51 @@ +#include +#include + +// FUSES START +#pragma config XINST = OFF +#pragma config FOSC = HS +#pragma config WDT = OFF +#pragma config LVP = OFF +#pragma config MCLRE = OFF + +void setup(void); +void isr(void) __interrupt (1); +int main(void); + +void setup(void){ + LATD = 0; + TRISD = 0; + + TRISB = 0xff; + LATB = 0x00; + ADCON1 = 0xf; + + INTCONbits.GIE = 1; + INTCONbits.PEIE = 1; + INTCONbits.RBIE = 1; + INTCON2bits.RBPU = 0; + INTCON2bits.RBIP = 1; + RCONbits.IPEN = 1; + + INTCONbits.INT0IE = 1; +} + +void isr(void) __interrupt (1) { + if (INTCONbits.RBIF) { + //if (INTCONbits.INT0IF) { + WREG = PORTB; /* Read portb to elimitate mismatch condition */ + LATD = ~LATD; + delay1ktcy(250); + } + //INTCONbits.INT0IF = 0; + INTCONbits.RBIF = 0; +} + +int main(void) { + setup(); + for (;;) { + //LATD = PORTB; + } + return 0; +} + diff --git a/c/interrupt/main.hex b/c/interrupt/main.hex new file mode 100755 index 0000000..aa041ff --- /dev/null +++ b/c/interrupt/main.hex @@ -0,0 +1,33 @@ +:020000040000FA +:0600000006EF00F0000015 +:080008005BEF00F011EEFFF0C8 +:1000100021EEFFF0F86AA68EA69C07EEFFF00068BE +:10002000ED6A0050FDE1800EF66E010EF76E000ED7 +:10003000F86E0900F5CF05F00900F5CF06F034D0D1 +:100040000900F5CF00F00900F5CF01F00900F5CF68 +:1000500002F009000900F5CFE9FF0900F5CFEAFF3A +:10006000090009000900F5CF03F00900F5CF04F0FD +:1000700009000900F6CF07F0F7CF08F0F8CF09F034 +:1000800000C0F6FF01C0F7FF02C0F8FF03D009006F +:10009000F5CFEEFF0306FBE20406F9E207C0F6FF28 +:1000A00008C0F7FF09C0F8FF0506CAE20606C8E265 +:1000B000C7EC00F0FFD7D8CFE5FFE0CFE5FFE56E56 +:1000C000F3CFE5FFF4CFE5FFE9CFE5FFEACFE5FFAA +:1000D000FACFE5FFFBCFE5FFD9CFE5FFE1CFD9FFB1 +:1000E000F2A005D081508C1EFA0E8CEC00F0F2903C +:1000F000E4CFD9FFE4CFFBFFE4CFFAFFE4CFEAFF80 +:10010000E4CFE9FFE4CFF4FFE4CFF3FFE450E4CF22 +:10011000E0FFE4CFD8FF1000E806E56E630E9FEC29 +:1001200000F0E4500BE000D0E56E630E9FEC00F0B1 +:1001300000D000D00000E450E82EF6D71200E80608 +:100140000000E85007E000D000D000D000D0000050 +:10015000E82EFAD71200D9CFE5FFE1CFD9FF8C6A9C +:10016000956AFF0E936E8A6A0F0EC16EF28EF28C44 +:10017000F286F19EF180D08EF288E4CFD9FF120092 +:100180000100040000006000000001000000ABEC72 +:0601900000F0FFD7120091 +:020000040030CA +:010001000CF2 +:010003001EDE +:02000500038175 +:00000001FF diff --git a/c/interrupt/main.o b/c/interrupt/main.o new file mode 100755 index 0000000..f7b84fd Binary files /dev/null and b/c/interrupt/main.o differ diff --git a/c/interrupt/makefile b/c/interrupt/makefile new file mode 100755 index 0000000..4243940 --- /dev/null +++ b/c/interrupt/makefile @@ -0,0 +1,32 @@ +# My pic workflow makefile by Fernando R Jacobo +# Dependencies +# SDCC Small Device C Compiler +# pk2cmd for pickit pic programmers + +# C compiler variables +SRC=*.c +CC=sdcc +FAMILY=pic16 +PROC=18f4550 + +# ASM and program variables +PPROC=PIC18F4550 +ASMPROC=18F4550 + +all: $(SRC:.c=.hex) + +comp: $(SRC) + $(CC) --use-non-free -m$(FAMILY) -p$(PROC) $^ + +clean: + rm -f $(SRC:.c=.asm) $(SRC:.c=.cod) $(SRC:.c=.hex) $(SRC:.c=.lst) $(SRC:.c=.o) + +program: + pk2cmd -M -P${PPROC} -Fmain.hex + +asm: *.asm + gpasm -p ${ASMPROC} -o main.hex $^ + +asmp: asm program + +.PHONY: all clean diff --git a/c/rotac/Makefile b/c/rotac/Makefile new file mode 100755 index 0000000..f7a4d90 --- /dev/null +++ b/c/rotac/Makefile @@ -0,0 +1,34 @@ +# My pic workflow makefile by Fernando R Jacobo +# Dependencies +# SDCC Small Device C Compiler +# pk2cmd for pickit pic programmers + +# C compiler variables +SRC=*.c +CC=sdcc +FAMILY=pic16 +PROC=18f4550 + +# ASM and program variables +PPROC=PIC18F4550 +ASMPROC=18F4550 + +all: $(SRC:.c=.hex) + +comp: $(SRC) + $(CC) --use-non-free -m$(FAMILY) -p$(PROC) $^ + +clean: + rm -f $(SRC:.c=.asm) $(SRC:.c=.cod) $(SRC:.c=.hex) $(SRC:.c=.lst) $(SRC:.c=.o) + +program: + pk2cmd -M -P${PPROC} -Fmain.hex + +asm: *.asm + gpasm -p ${ASMPROC} -o main.hex $^ + +asmp: asm program + +compp: comp program + +.PHONY: all clean diff --git a/c/rotac/compile_commands.json b/c/rotac/compile_commands.json new file mode 100755 index 0000000..fe51488 --- /dev/null +++ b/c/rotac/compile_commands.json @@ -0,0 +1 @@ +[] diff --git a/c/rotac/main.asm b/c/rotac/main.asm new file mode 100755 index 0000000..12862e5 --- /dev/null +++ b/c/rotac/main.asm @@ -0,0 +1,710 @@ +;-------------------------------------------------------- +; File Created by SDCC : free open source ISO C Compiler +; Version 4.5.0 #15242 (Linux) +;-------------------------------------------------------- +; PIC16 port for the Microchip 16-bit core micros +;-------------------------------------------------------- + list p=18f4550 + radix dec + CONFIG XINST=OFF + CONFIG FOSC=HS + CONFIG WDT=OFF + CONFIG LVP=OFF + CONFIG MCLRE=OFF + + +;-------------------------------------------------------- +; public variables in this module +;-------------------------------------------------------- + global _main + global _rota1 + global _rota2 + global _rota3 + global _rota4 + global _rota5 + global _sram_end + +;-------------------------------------------------------- +; extern variables in this module +;-------------------------------------------------------- + extern _SPPCFGbits + extern _SPPEPSbits + extern _SPPCONbits + extern _UFRMLbits + extern _UFRMHbits + extern _UIRbits + extern _UIEbits + extern _UEIRbits + extern _UEIEbits + extern _USTATbits + extern _UCONbits + extern _UADDRbits + extern _UCFGbits + extern _UEP0bits + extern _UEP1bits + extern _UEP2bits + extern _UEP3bits + extern _UEP4bits + extern _UEP5bits + extern _UEP6bits + extern _UEP7bits + extern _UEP8bits + extern _UEP9bits + extern _UEP10bits + extern _UEP11bits + extern _UEP12bits + extern _UEP13bits + extern _UEP14bits + extern _UEP15bits + extern _PORTAbits + extern _PORTBbits + extern _PORTCbits + extern _PORTDbits + extern _PORTEbits + extern _LATAbits + extern _LATBbits + extern _LATCbits + extern _LATDbits + extern _LATEbits + extern _DDRAbits + extern _TRISAbits + extern _DDRBbits + extern _TRISBbits + extern _DDRCbits + extern _TRISCbits + extern _DDRDbits + extern _TRISDbits + extern _DDREbits + extern _TRISEbits + extern _OSCTUNEbits + extern _PIE1bits + extern _PIR1bits + extern _IPR1bits + extern _PIE2bits + extern _PIR2bits + extern _IPR2bits + extern _EECON1bits + extern _RCSTAbits + extern _TXSTAbits + extern _T3CONbits + extern _CMCONbits + extern _CVRCONbits + extern _CCP1ASbits + extern _ECCP1ASbits + extern _CCP1DELbits + extern _ECCP1DELbits + extern _BAUDCONbits + extern _BAUDCTLbits + extern _CCP2CONbits + extern _CCP1CONbits + extern _ECCP1CONbits + extern _ADCON2bits + extern _ADCON1bits + extern _ADCON0bits + extern _SSPCON2bits + extern _SSPCON1bits + extern _SSPSTATbits + extern _T2CONbits + extern _T1CONbits + extern _RCONbits + extern _WDTCONbits + extern _HLVDCONbits + extern _LVDCONbits + extern _OSCCONbits + extern _T0CONbits + extern _STATUSbits + extern _INTCON3bits + extern _INTCON2bits + extern _INTCONbits + extern _STKPTRbits + extern _SPPDATA + extern _SPPCFG + extern _SPPEPS + extern _SPPCON + extern _UFRM + extern _UFRML + extern _UFRMH + extern _UIR + extern _UIE + extern _UEIR + extern _UEIE + extern _USTAT + extern _UCON + extern _UADDR + extern _UCFG + extern _UEP0 + extern _UEP1 + extern _UEP2 + extern _UEP3 + extern _UEP4 + extern _UEP5 + extern _UEP6 + extern _UEP7 + extern _UEP8 + extern _UEP9 + extern _UEP10 + extern _UEP11 + extern _UEP12 + extern _UEP13 + extern _UEP14 + extern _UEP15 + extern _PORTA + extern _PORTB + extern _PORTC + extern _PORTD + extern _PORTE + extern _LATA + extern _LATB + extern _LATC + extern _LATD + extern _LATE + extern _DDRA + extern _TRISA + extern _DDRB + extern _TRISB + extern _DDRC + extern _TRISC + extern _DDRD + extern _TRISD + extern _DDRE + extern _TRISE + extern _OSCTUNE + extern _PIE1 + extern _PIR1 + extern _IPR1 + extern _PIE2 + extern _PIR2 + extern _IPR2 + extern _EECON1 + extern _EECON2 + extern _EEDATA + extern _EEADR + extern _RCSTA + extern _TXSTA + extern _TXREG + extern _RCREG + extern _SPBRG + extern _SPBRGH + extern _T3CON + extern _TMR3 + extern _TMR3L + extern _TMR3H + extern _CMCON + extern _CVRCON + extern _CCP1AS + extern _ECCP1AS + extern _CCP1DEL + extern _ECCP1DEL + extern _BAUDCON + extern _BAUDCTL + extern _CCP2CON + extern _CCPR2 + extern _CCPR2L + extern _CCPR2H + extern _CCP1CON + extern _ECCP1CON + extern _CCPR1 + extern _CCPR1L + extern _CCPR1H + extern _ADCON2 + extern _ADCON1 + extern _ADCON0 + extern _ADRES + extern _ADRESL + extern _ADRESH + extern _SSPCON2 + extern _SSPCON1 + extern _SSPSTAT + extern _SSPADD + extern _SSPBUF + extern _T2CON + extern _PR2 + extern _TMR2 + extern _T1CON + extern _TMR1 + extern _TMR1L + extern _TMR1H + extern _RCON + extern _WDTCON + extern _HLVDCON + extern _LVDCON + extern _OSCCON + extern _T0CON + extern _TMR0 + extern _TMR0L + extern _TMR0H + extern _STATUS + extern _FSR2L + extern _FSR2H + extern _PLUSW2 + extern _PREINC2 + extern _POSTDEC2 + extern _POSTINC2 + extern _INDF2 + extern _BSR + extern _FSR1L + extern _FSR1H + extern _PLUSW1 + extern _PREINC1 + extern _POSTDEC1 + extern _POSTINC1 + extern _INDF1 + extern _WREG + extern _FSR0L + extern _FSR0H + extern _PLUSW0 + extern _PREINC0 + extern _POSTDEC0 + extern _POSTINC0 + extern _INDF0 + extern _INTCON3 + extern _INTCON2 + extern _INTCON + extern _PROD + extern _PRODL + extern _PRODH + extern _TABLAT + extern _TBLPTR + extern _TBLPTRL + extern _TBLPTRH + extern _TBLPTRU + extern _PC + extern _PCL + extern _PCLATH + extern _PCLATU + extern _STKPTR + extern _TOS + extern _TOSL + extern _TOSH + extern _TOSU + extern _delay1ktcy + +;-------------------------------------------------------- +; Equates to used internal registers +;-------------------------------------------------------- +STATUS equ 0xfd8 +FSR1L equ 0xfe1 +FSR2L equ 0xfd9 +POSTDEC1 equ 0xfe5 +PREINC1 equ 0xfe4 + + +; Internal registers +.registers udata_ovr 0x0000 +r0x00 res 1 +r0x01 res 1 + + +ustat_main_00 udata 0X07FF +_sram_end res 0 + +;-------------------------------------------------------- +; interrupt vector +;-------------------------------------------------------- + +;-------------------------------------------------------- +; global & static initialisations +;-------------------------------------------------------- +; I code from now on! +; ; Starting pCode block +S_main__main code +_main: +; .line 23; main.c TRISD = 0; + CLRF _TRISD +; .line 24; main.c LATD = 0; + CLRF _LATD +; .line 25; main.c TRISE = 0; + CLRF _TRISE +; .line 26; main.c LATE = 0x04; + MOVLW 0x04 + MOVWF _LATE +; .line 27; main.c TRISB = 0xff; + MOVLW 0xff + MOVWF _TRISB +; .line 30; main.c INTCON2bits.RBPU = 0; + BCF _INTCON2bits, 7 +; .line 31; main.c ADCON1 = 0x0f; + MOVLW 0x0f + MOVWF _ADCON1 +_00112_DS_: +; .line 35; main.c port = PORTB; + MOVFF _PORTB, r0x00 +; .line 36; main.c switch (port) { + MOVF r0x00, W + XORLW 0x01 + BZ _00105_DS_ + MOVF r0x00, W + XORLW 0x02 + BZ _00106_DS_ + MOVF r0x00, W + XORLW 0x04 + BZ _00107_DS_ + MOVF r0x00, W + XORLW 0x08 + BZ _00108_DS_ + MOVF r0x00, W + XORLW 0x10 + BZ _00109_DS_ + BRA _00110_DS_ +_00105_DS_: +; .line 38; main.c rota1(); + CALL _rota1 +; .line 39; main.c break; + BRA _00110_DS_ +_00106_DS_: +; .line 41; main.c rota2(); + CALL _rota2 +; .line 42; main.c break; + BRA _00110_DS_ +_00107_DS_: +; .line 44; main.c rota3(); + CALL _rota3 +; .line 45; main.c break; + BRA _00110_DS_ +_00108_DS_: +; .line 47; main.c rota4(); + CALL _rota4 +; .line 48; main.c break; + BRA _00110_DS_ +_00109_DS_: +; .line 50; main.c rota5(); + CALL _rota5 +_00110_DS_: +; .line 53; main.c delay1ktcy(50); // 1s @ 1MHz + MOVLW 0x32 + CALL _delay1ktcy + BRA _00112_DS_ +; .line 55; main.c } + RETURN + +; ; Starting pCode block +S_main__rota5 code +_rota5: +; .line 134; main.c void rota5(void) { + MOVFF FSR2L, POSTDEC1 + MOVFF FSR1L, FSR2L +; .line 135; main.c LATD = 0x55; + MOVLW 0x55 + MOVWF _LATD +; .line 136; main.c delay1ktcy(150); + MOVLW 0x96 + CALL _delay1ktcy +; .line 137; main.c LATD = 0xAA; + MOVLW 0xaa + MOVWF _LATD +; .line 138; main.c delay1ktcy(150); + MOVLW 0x96 + CALL _delay1ktcy +; .line 139; main.c } + MOVFF PREINC1, FSR2L + RETURN + +; ; Starting pCode block +S_main__rota4 code +_rota4: +; .line 122; main.c void rota4(void) { + MOVFF FSR2L, POSTDEC1 + MOVFF FSR1L, FSR2L + MOVFF r0x00, POSTDEC1 + MOVFF r0x01, POSTDEC1 +; .line 123; main.c LATD = 1; + MOVLW 0x01 + MOVWF _LATD +_00343_DS_: +; .line 124; main.c while (LATD != 0x80) { + MOVF _LATD, W + XORLW 0x80 + BZ _00345_DS_ +; .line 125; main.c delay1ktcy(150); + MOVLW 0x96 + CALL _delay1ktcy +; .line 126; main.c RLCF(LATD); + RLNCF _LATD, W + ANDLW 0xfe + MOVWF r0x00 + RLNCF _LATD, W + ANDLW 0x01 + MOVWF r0x01 + MOVF r0x01, W + IORWF r0x00, W + MOVWF _LATD + BRA _00343_DS_ +_00345_DS_: +; .line 128; main.c LATD = 0x80; + MOVLW 0x80 + MOVWF _LATD +_00346_DS_: +; .line 129; main.c while (LATD != 0x01) { + MOVF _LATD, W + XORLW 0x01 + BZ _00349_DS_ +; .line 130; main.c delay1ktcy(150); + MOVLW 0x96 + CALL _delay1ktcy +; .line 131; main.c RRCF(LATD); + RRNCF _LATD, W + ANDLW 0x7f + MOVWF r0x00 + RRNCF _LATD, W + ANDLW 0x80 + MOVWF r0x01 + MOVF r0x01, W + IORWF r0x00, W + MOVWF _LATD + BRA _00346_DS_ +_00349_DS_: +; .line 133; main.c } + MOVFF PREINC1, r0x01 + MOVFF PREINC1, r0x00 + MOVFF PREINC1, FSR2L + RETURN + +; ; Starting pCode block +S_main__rota3 code +_rota3: +; .line 73; main.c void rota3(void) { + MOVFF FSR2L, POSTDEC1 + MOVFF FSR1L, FSR2L + MOVFF r0x00, POSTDEC1 + MOVFF r0x01, POSTDEC1 +; .line 74; main.c LATD = 0x01; + MOVLW 0x01 + MOVWF _LATD +_00212_DS_: +; .line 75; main.c while (LATD != 0x80) { + MOVF _LATD, W + XORLW 0x80 + BZ _00214_DS_ +; .line 76; main.c delay1ktcy(150); + MOVLW 0x96 + CALL _delay1ktcy +; .line 77; main.c RLCF(LATD); + RLNCF _LATD, W + ANDLW 0xfe + MOVWF r0x00 + RLNCF _LATD, W + ANDLW 0x01 + MOVWF r0x01 + MOVF r0x01, W + IORWF r0x00, W + MOVWF _LATD + BRA _00212_DS_ +_00214_DS_: +; .line 79; main.c LATD = 0x81; + MOVLW 0x81 + MOVWF _LATD +_00215_DS_: +; .line 80; main.c while (LATD != 0xC0) { + MOVF _LATD, W + XORLW 0xc0 + BZ _00217_DS_ +; .line 81; main.c delay1ktcy(150); + MOVLW 0x96 + CALL _delay1ktcy +; .line 82; main.c LATD = LATD << 1; + BCF STATUS, 0 + RLCF _LATD, F +; .line 83; main.c LATD |= 0x80; + BSF _LATD, 7 + BRA _00215_DS_ +_00217_DS_: +; .line 85; main.c LATD = 0xC1; + MOVLW 0xc1 + MOVWF _LATD +_00218_DS_: +; .line 86; main.c while (LATD != 0xE0) { + MOVF _LATD, W + XORLW 0xe0 + BZ _00220_DS_ +; .line 87; main.c delay1ktcy(150); + MOVLW 0x96 + CALL _delay1ktcy +; .line 88; main.c LATD = LATD << 1; + BCF STATUS, 0 + RLCF _LATD, F +; .line 89; main.c LATD |= 0xC0; + MOVLW 0xc0 + IORWF _LATD, F + BRA _00218_DS_ +_00220_DS_: +; .line 91; main.c LATD = 0xE1; + MOVLW 0xe1 + MOVWF _LATD +_00221_DS_: +; .line 92; main.c while (LATD != 0xF0) { + MOVF _LATD, W + XORLW 0xf0 + BZ _00223_DS_ +; .line 93; main.c delay1ktcy(150); + MOVLW 0x96 + CALL _delay1ktcy +; .line 94; main.c LATD = LATD << 1; + BCF STATUS, 0 + RLCF _LATD, F +; .line 95; main.c LATD |= 0xE0; + MOVLW 0xe0 + IORWF _LATD, F + BRA _00221_DS_ +_00223_DS_: +; .line 97; main.c LATD = 0xF1; + MOVLW 0xf1 + MOVWF _LATD +_00224_DS_: +; .line 98; main.c while (LATD != 0xF8) { + MOVF _LATD, W + XORLW 0xf8 + BZ _00226_DS_ +; .line 99; main.c delay1ktcy(150); + MOVLW 0x96 + CALL _delay1ktcy +; .line 100; main.c LATD = LATD << 1; + BCF STATUS, 0 + RLCF _LATD, F +; .line 101; main.c LATD |= 0xF0; + MOVLW 0xf0 + IORWF _LATD, F + BRA _00224_DS_ +_00226_DS_: +; .line 103; main.c LATD = 0xF9; + MOVLW 0xf9 + MOVWF _LATD +_00227_DS_: +; .line 104; main.c while (LATD != 0xFC) { + MOVF _LATD, W + XORLW 0xfc + BZ _00229_DS_ +; .line 105; main.c delay1ktcy(150); + MOVLW 0x96 + CALL _delay1ktcy +; .line 106; main.c LATD = LATD << 1; + BCF STATUS, 0 + RLCF _LATD, F +; .line 107; main.c LATD |= 0xF8; + MOVLW 0xf8 + IORWF _LATD, F + BRA _00227_DS_ +_00229_DS_: +; .line 109; main.c LATD = 0xFD; + MOVLW 0xfd + MOVWF _LATD +_00230_DS_: +; .line 110; main.c while (LATD != 0xFE) { + MOVF _LATD, W + XORLW 0xfe + BZ _00232_DS_ +; .line 111; main.c delay1ktcy(150); + MOVLW 0x96 + CALL _delay1ktcy +; .line 112; main.c LATD = LATD << 1; + BCF STATUS, 0 + RLCF _LATD, F +; .line 113; main.c LATD |= 0xFC; + MOVLW 0xfc + IORWF _LATD, F + BRA _00230_DS_ +_00232_DS_: +; .line 115; main.c delay1ktcy(150); + MOVLW 0x96 + CALL _delay1ktcy +; .line 116; main.c LATD = 0xFE; + MOVLW 0xfe + MOVWF _LATD +; .line 117; main.c delay1ktcy(150); + MOVLW 0x96 + CALL _delay1ktcy +; .line 118; main.c LATD = 0xFF; + MOVLW 0xff + MOVWF _LATD +; .line 119; main.c delay1ktcy(150); + MOVLW 0x96 + CALL _delay1ktcy +; .line 121; main.c } + MOVFF PREINC1, r0x01 + MOVFF PREINC1, r0x00 + MOVFF PREINC1, FSR2L + RETURN + +; ; Starting pCode block +S_main__rota2 code +_rota2: +; .line 65; main.c void rota2(void) { + MOVFF FSR2L, POSTDEC1 + MOVFF FSR1L, FSR2L + MOVFF r0x00, POSTDEC1 + MOVFF r0x01, POSTDEC1 +; .line 66; main.c LATD = 0x80; + MOVLW 0x80 + MOVWF _LATD +_00189_DS_: +; .line 67; main.c while (LATD != 0x01) { + MOVF _LATD, W + XORLW 0x01 + BZ _00192_DS_ +; .line 68; main.c delay1ktcy(150); + MOVLW 0x96 + CALL _delay1ktcy +; .line 69; main.c RRCF(LATD); + RRNCF _LATD, W + ANDLW 0x7f + MOVWF r0x00 + RRNCF _LATD, W + ANDLW 0x80 + MOVWF r0x01 + MOVF r0x01, W + IORWF r0x00, W + MOVWF _LATD + BRA _00189_DS_ +_00192_DS_: +; .line 72; main.c } + MOVFF PREINC1, r0x01 + MOVFF PREINC1, r0x00 + MOVFF PREINC1, FSR2L + RETURN + +; ; Starting pCode block +S_main__rota1 code +_rota1: +; .line 57; main.c void rota1(void) { + MOVFF FSR2L, POSTDEC1 + MOVFF FSR1L, FSR2L + MOVFF r0x00, POSTDEC1 + MOVFF r0x01, POSTDEC1 +; .line 58; main.c LATD = 1; + MOVLW 0x01 + MOVWF _LATD +_00166_DS_: +; .line 59; main.c while (LATD != 0x80) { + MOVF _LATD, W + XORLW 0x80 + BZ _00169_DS_ +; .line 60; main.c delay1ktcy(150); + MOVLW 0x96 + CALL _delay1ktcy +; .line 61; main.c RLCF(LATD); + RLNCF _LATD, W + ANDLW 0xfe + MOVWF r0x00 + RLNCF _LATD, W + ANDLW 0x01 + MOVWF r0x01 + MOVF r0x01, W + IORWF r0x00, W + MOVWF _LATD + BRA _00166_DS_ +_00169_DS_: +; .line 64; main.c } + MOVFF PREINC1, r0x01 + MOVFF PREINC1, r0x00 + MOVFF PREINC1, FSR2L + RETURN + + + +; Statistics: +; code size: 608 (0x0260) bytes ( 0.46%) +; 304 (0x0130) words +; udata size: 0 (0x0000) bytes ( 0.00%) +; access size: 2 (0x0002) bytes + + + end diff --git a/c/rotac/main.c b/c/rotac/main.c new file mode 100755 index 0000000..ed77231 --- /dev/null +++ b/c/rotac/main.c @@ -0,0 +1,145 @@ +#include +#include +#include + +/* Configs options */ +#pragma config XINST = OFF /* Extended instruction set */ +#pragma config FOSC = HS /* Internal osc */ +#pragma config WDT = OFF /* Watchdog timer */ +#pragma config LVP = OFF /* Single Supply ICSP OFF */ +#pragma config MCLRE = OFF + +#define RRCF(F) F = ((F >> 1) | (F << 7)) +#define RLCF(F) F = ((F << 1) | (F >> 7)) + +void rota1(void); +void rota2(void); +void rota3(void); +void rota4(void); +void rota5(void); +void main(void); + +void main(void) { + TRISD = 0; + LATD = 0; + TRISE = 0; + LATE = 0x04; + TRISB = 0xff; + //LATB = 0; + + INTCON2bits.RBPU = 0; + ADCON1 = 0x0f; + uint8_t port = 0; + + while (1) { + port = PORTB; + switch (port) { + case 0x01: + rota1(); + break; + case 0x02: + rota2(); + break; + case 0x04: + rota3(); + break; + case 0x08: + rota4(); + break; + case 0x10: + rota5(); + break; + } + delay1ktcy(50); // 1s @ 1MHz + } +} + +void rota1(void) { + LATD = 1; + while (LATD != 0x80) { + delay1ktcy(150); + RLCF(LATD); + } + return; +} +void rota2(void) { + LATD = 0x80; + while (LATD != 0x01) { + delay1ktcy(150); + RRCF(LATD); + } + return; +} +void rota3(void) { + LATD = 0x01; + while (LATD != 0x80) { + delay1ktcy(150); + RLCF(LATD); + } + LATD = 0x81; + while (LATD != 0xC0) { + delay1ktcy(150); + LATD = LATD << 1; + LATD |= 0x80; + } + LATD = 0xC1; + while (LATD != 0xE0) { + delay1ktcy(150); + LATD = LATD << 1; + LATD |= 0xC0; + } + LATD = 0xE1; + while (LATD != 0xF0) { + delay1ktcy(150); + LATD = LATD << 1; + LATD |= 0xE0; + } + LATD = 0xF1; + while (LATD != 0xF8) { + delay1ktcy(150); + LATD = LATD << 1; + LATD |= 0xF0; + } + LATD = 0xF9; + while (LATD != 0xFC) { + delay1ktcy(150); + LATD = LATD << 1; + LATD |= 0xF8; + } + LATD = 0xFD; + while (LATD != 0xFE) { + delay1ktcy(150); + LATD = LATD << 1; + LATD |= 0xFC; + } + delay1ktcy(150); + LATD = 0xFE; + delay1ktcy(150); + LATD = 0xFF; + delay1ktcy(150); + return; +} +void rota4(void) { + LATD = 1; + while (LATD != 0x80) { + delay1ktcy(150); + RLCF(LATD); + } + LATD = 0x80; + while (LATD != 0x01) { + delay1ktcy(150); + RRCF(LATD); + } +} +void rota5(void) { + LATD = 0x55; + delay1ktcy(150); + LATD = 0xAA; + delay1ktcy(150); +} + +/* NOTES + * Looks like I can treat register like normal variables + * Use PORT instead of LAT for reading + * != doesnt work + */ diff --git a/c/rotac/main.hex b/c/rotac/main.hex new file mode 100755 index 0000000..bd9d01d --- /dev/null +++ b/c/rotac/main.hex @@ -0,0 +1,60 @@ +:020000040000FA +:100000007DEF00F0D9CFE5FFE1CFD9FF00C0E5FFDC +:1000100001C0E5FF010E8C6E8C50800A0DE0960E3B +:1000200076EC01F08C44FE0B006E8C44010B016EEB +:10003000015000108C6EF0D7810E8C6E8C50C00A6F +:1000400007E0960E76EC01F0D8908C368C8EF6D7C1 +:10005000C10E8C6E8C50E00A08E0960E76EC01F032 +:10006000D8908C36C00E8C12F5D7E10E8C6E8C5069 +:10007000F00A08E0960E76EC01F0D8908C36E00E8F +:100080008C12F5D7F10E8C6E8C50F80A08E0960EA3 +:1000900076EC01F0D8908C36F00E8C12F5D7F90E74 +:1000A0008C6E8C50FC0A08E0960E76EC01F0D8902D +:1000B0008C36F80E8C12F5D7FD0E8C6E8C50FE0A25 +:1000C00008E0960E76EC01F0D8908C36FC0E8C127F +:1000D000F5D7960E76EC01F0FE0E8C6E960E76EC51 +:1000E00001F0FF0E8C6E960E76EC01F0E4CF01F07D +:1000F000E4CF00F0E4CFD9FF120011EEFFF021EEC3 +:10010000FFF0F86AA68EA69C07EEFFF00068ED6A85 +:100110000050FDE14C0EF66E030EF76E000EF86E09 +:100120000900F5CF05F00900F5CF06F034D009003D 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Dependencies +# SDCC Small Device C Compiler +# pk2cmd for pickit pic programmers + +# C compiler variables +SRC=*.c +CC=sdcc +FAMILY=pic16 +PROC=18f4550 + +# ASM and program variables +PPROC=PIC18F4550 +ASMPROC=18F4550 + +all: $(SRC:.c=.hex) + +comp: $(SRC) + $(CC) --use-non-free -m$(FAMILY) -p$(PROC) $^ + +clean: + rm -f $(SRC:.c=.asm) $(SRC:.c=.cod) $(SRC:.c=.hex) $(SRC:.c=.lst) $(SRC:.c=.o) + +program: + pk2cmd -M -P${PPROC} -Fmain.hex + +asm: *.asm + gpasm -p ${ASMPROC} -o main.hex $^ + +asmp: asm program + +.PHONY: all clean diff --git a/c/test/main.c b/c/test/main.c new file mode 100755 index 0000000..5f6cf68 --- /dev/null +++ b/c/test/main.c @@ -0,0 +1,31 @@ +#include +#include + +// Use this to define the interrupt vector for high-priority interrupts +void interrupt high_priority isr(void) { + // Check if it's a PORTB change interrupt + if (INTCON.RBIF) { + // Handle the change here + // Example: toggle a pin, read input, etc. + + // Clear the interrupt flag + INTCON.RBIF = 0; + } +} + +void main(void) { + // Set PORTB pins RB4-RB7 as input + TRISB |= 0xF0; // Set RB4-RB7 as input (1) + + // Enable PORTB change interrupt + INTCON.RBIE = 1; // Enable PORTB change interrupt + INTCON.RBIF = 0; // Clear PORTB interrupt flag + INTCON.GIE = 1; // Enable global interrupts + INTCON.PEIE = 1; // Enable peripheral interrupts (recommended) + + // Main loop + while (1) { + // Your main code here (e.g., sleep, check flags, etc.) + } +} + diff --git a/eventc/Makefile b/eventc/Makefile new file mode 100755 index 0000000..0d8bf79 --- /dev/null +++ b/eventc/Makefile @@ -0,0 +1,32 @@ +# My pic workflow makefile by Fernando R Jacobo +# Dependencies +# SDCC Small Device C Compiler +# pk2cmd for pickit pic programmers + +# C compiler variables +SRC=*.c +CC=sdcc +FAMILY=pic16 +PROC=18f4550 + +# ASM and program variables +PPROC=PIC18F4550 +ASMPROC=18F4550 + +all: $(SRC:.c=.hex) + +comp: $(SRC) + $(CC) --use-non-free -m$(FAMILY) -p$(PROC) $^ + +clean: + rm -f $(SRC:.c=.asm) $(SRC:.c=.cod) $(SRC:.c=.hex) $(SRC:.c=.lst) $(SRC:.c=.o) + +program: + pk2cmd -M -P${PPROC} -X -Fmain.hex + +asm: *.asm + gpasm -p ${ASMPROC} -o main.hex $^ + +asmp: asm program + +.PHONY: all clean diff --git a/eventc/main.asm b/eventc/main.asm new file mode 100755 index 0000000..b763585 --- /dev/null +++ b/eventc/main.asm @@ -0,0 +1,210 @@ +LIST P=18F4550 +#include + +CONFIG FOSC = HS ; Use internal oscillator, RA6 as clock output +CONFIG WDT = OFF ; Watchdog Timer off +CONFIG LVP = OFF ; Low-Voltage Programming off +CONFIG MCLRE = ON ; MCLR pin disabled, RE3 input enabled + +;mem +R1 EQU 0x020 +R2 EQU 0x021 +R3 EQU 0x024 +R4 EQU 0x026 +R5 EQU 0x027 +TEMP EQU 0x23 +CUENTA EQU 0x022 +CUENTA2 EQU 0x034 +DISP0 EQU 0x30 +DISP1 EQU 0x31 +DISP2 EQU 0x32 +DISP3 EQU 0x33 + + ORG 0x00 + GOTO INIT + + ORG 0x08 ; Interrupt vector for high-priority interrupts + goto ISR ; Jump to Interrupt Service Routine + +INIT: + ; === Configure RB4-RB7 as Input === + movlw 0xff + movwf TRISB + clrf TRISD + clrf LATD + + movlw 0x0f + movwf ADCON1 + + clrf CUENTA + clrf CUENTA2 + + clrf TRISE + clrf LATE + clrf TRISA + clrf LATA + + ; === Enable RB Port Change Interrupt === + BSF RCON, IPEN + BCF INTCON2, RBPU ; Enable PORTB pull-ups + BSF INTCON2, 0 ; Set interrupt on high priority RBIP + ;BSF INTCON, RBIE ; Enable RB Port Change Interrupt + BSF INTCON, GIE ; Enable Global Interrupts + BSF INTCON, PEIE ; Enable Peripheral Interrupts + ; INT0 + BSF INTCON, INT0IE + BCF INTCON2, INTEDG0 + ;BSF INTCON, INT1IE + ;BSF INTCON2, INTEDG1 + + movlw 0x00 + movwf CUENTA + call splitDigit + +MAIN_LOOP: + ;MOVFF PORTB, PORTD + call Delay + GOTO MAIN_LOOP ; Stay in loop, wait for interrupts + +; === Interrupt Service Routine === +ISR: + ;BTFSS INTCON, RBIF ; Check if RB Change interrupt occurred + ;RETFIE; Return if not triggered + BTFSS INTCON, INT0IF + RETFIE + MOVF PORTB, W ; Read PORTB (necessary to clear mismatch condition) + ; Interrupt code + incf CUENTA, W + daw + movwf CUENTA + call splitDigit + call SDelay + + ;BCF INTCON, RBIF ; Clear the RBIF flag + BCF INTCON, INT0IF + ;BCF INTCON, INT1IF + RETFIE; Return from interrupt + +splitDigit: + movf CUENTA, W + andlw 0x0f + movwf DISP0 + swapf CUENTA, W + andlw 0x0f + movwf DISP1 + movf CUENTA2, W + andlw 0x0f + movwf DISP2 + swapf CUENTA2, W + andlw 0x0f + movwf DISP3 + return + +disp_delay: + movlw D'250' + movwf R3 +disp_delay_inner: + NOP + NOP + NOP + NOP + decfsz R3, F + goto disp_delay_inner + return + +sevensw: + movlw high(sevenjmp) + movwf PCLATH + movf TEMP, W + addwf TEMP, W + addlw low(sevenjmp) + btfsc STATUS, 0 + incf PCLATH, 1 + movwf PCL +sevenjmp: + retlw 3Fh + retlw 06h + retlw 5Bh + retlw 4Fh + retlw 66h + retlw 6Dh + retlw 7Dh + retlw 07h ; siete + retlw 7Fh ; ocho + retlw 6Fh ; nueve + retlw 77h ; A + retlw 7Ch ; B + retlw 39h ; C + retlw 5Eh ; D + retlw 79h ; E + retlw 71h ; F + +Delay: + MOVLW D'250' ; Outer loop count + MOVWF R1 +Delay_Outer: + MOVLW D'250' ; Inner loop count + MOVWF R2 +Delay_Inner: + NOP ; Do nothing (No Operation) + NOP + DECFSZ R2, F ; Decrement inner loop counter + GOTO Delay_Inner ; Repeat inner loop + call display + DECFSZ R1, F ; Decrement outer loop counter + GOTO Delay_Outer ; Repeat outer loop + RETURN ; Return from delay + +SDelay: + MOVLW D'150' ; Outer loop count + MOVWF R4 +SDelay_Outer: + MOVLW D'250' ; Inner loop count + MOVWF R5 +SDelay_Inner: + NOP ; Do nothing (No Operation) + NOP + DECFSZ R5, F ; Decrement inner loop counter + GOTO SDelay_Inner ; Repeat inner loop + call display + DECFSZ R4, F ; Decrement outer loop counter + GOTO SDelay_Outer ; Repeat outer loop + RETURN ; Return from delay + +display: + clrf PORTD + movff DISP0, TEMP + call sevensw + movwf PORTD + movlw 0x04 + movwf PORTE + call disp_delay + + clrf PORTD + movff DISP1, TEMP + call sevensw + movwf PORTD + movlw 0x02 + movwf PORTE + call disp_delay + + clrf PORTD + movff DISP2, TEMP + call sevensw + movwf PORTD + movlw 0x01 + movwf PORTE + call disp_delay + + clrf PORTD + clrf PORTE + movff DISP3, TEMP + call sevensw + movwf PORTD + movlw 0x10 + movwf PORTA + call disp_delay + clrf PORTA + return + + END diff --git a/eventc/main.hex b/eventc/main.hex new file mode 100755 index 0000000..290f1e6 --- /dev/null +++ b/eventc/main.hex @@ -0,0 +1,28 @@ +:020000040000FA +:0400000006EF00F017 +:0800080021EF00F0FF0E936EE2 +:10001000956A8C6A0F0EC16E226A346A966A8D6A7E +:10002000926A896AD08EF19EF180F28EF28CF2880B +:10003000F19C000E226E2DEC00F05CEC00F01DEF48 +:1000400000F0F2A21000815022280700226E2DEC51 +:1000500000F06BEC00F0F292100022500F0B306EAB +:1000600022380F0B316E34500F0B326E34380F0BB9 +:10007000336E1200FA0E246E000000000000000033 +:10008000242E3CEF00F01200000EFA6E23502324C1 +:10009000980FD8B0FA2AF96E3F0C060C5B0C4F0C87 +:1000A000660C6D0C7D0C070C7F0C6F0C770C7C0CB8 +:1000B000390C5E0C790C710CFA0E206EFA0E216E62 +:1000C00000000000212E60EF00F07AEC00F0202EFE +:1000D0005EEF00F01200960E266EFA0E276E0000FC +:1000E0000000272E6FEF00F07AEC00F0262E6DEF67 +:1000F00000F01200836A30C023F044EC00F0836EFD +:10010000040E846E3AEC00F0836A31C023F044ECB4 +:1001100000F0836E020E846E3AEC00F0836A32C007 +:1001200023F044EC00F0836E010E846E3AEC00F094 +:10013000836A846A33C023F044EC00F0836E100EAF +:0A014000806E3AEC00F0806A1200B5 +:020000040030CA +:04000000000C1F1EB3 +:020005008381F5 +:060008000FC00FE00F40E5 +:00000001FF diff --git a/keypad/Makefile b/keypad/Makefile new file mode 100755 index 0000000..4243940 --- /dev/null +++ b/keypad/Makefile @@ -0,0 +1,32 @@ +# My pic workflow makefile by Fernando R Jacobo +# Dependencies +# SDCC Small Device C Compiler +# pk2cmd for pickit pic programmers + +# C compiler variables +SRC=*.c +CC=sdcc +FAMILY=pic16 +PROC=18f4550 + +# ASM and program variables +PPROC=PIC18F4550 +ASMPROC=18F4550 + +all: $(SRC:.c=.hex) + +comp: $(SRC) + $(CC) --use-non-free -m$(FAMILY) -p$(PROC) $^ + +clean: + rm -f $(SRC:.c=.asm) $(SRC:.c=.cod) $(SRC:.c=.hex) $(SRC:.c=.lst) $(SRC:.c=.o) + +program: + pk2cmd -M -P${PPROC} -Fmain.hex + +asm: *.asm + gpasm -p ${ASMPROC} -o main.hex $^ + +asmp: asm program + +.PHONY: all clean diff --git a/keypad/main.asm b/keypad/main.asm new file mode 100755 index 0000000..63b4683 --- /dev/null +++ b/keypad/main.asm @@ -0,0 +1,201 @@ + LIST P=18F4550 + #include + + CONFIG FOSC = HS ; Use internal oscillator, RA6 as clock output + CONFIG WDT = OFF ; Watchdog Timer off + CONFIG LVP = OFF ; Low-Voltage Programming off + CONFIG MCLRE = OFF ; MCLR pin disabled, RE3 input enabled + +; Definitions +R3 EQU 0x024 +R4 EQU 0x025 +R5 EQU 0x026 +TEMP EQU 0x038 +COL EQU 0x039 +READ EQU 0x03A +SHIFT EQU 0x03B + + ORG 0x00 + GOTO INIT + + ORG 0x08 + GOTO ISR + +INIT: + CLRF LATB + movlw 0xf0 ; PORTB setup + MOVWF TRISB + + movlw 0x0f + movwf ADCON1 + + clrf TRISD ; Set port D as output + clrf LATD + CLRF TRISE + CLRF LATE + + BSF PORTE, 2 + CLRF TEMP + CLRF COL + CLRF SHIFT + CLRF READ + + ; Configure interrupts + BSF RCON, IPEN ; + BSF INTCON, GIE ; Enable Global Interrupts + BSF INTCON, PEIE ; Enable Peripheral Interrupts + BSF INTCON, RBIE ; Enable RB Port Change Interrupt + BCF INTCON2, RBPU ; Enable PORTB pull-ups + BSF INTCON2, RBIP ; Set interrupt on high priority RBIP + +LOOP: + MOVLW 0x0E + MOVWF SHIFT + MOVWF PORTB + + CALL disp_delay + MOVLW 0x0D + MOVWF SHIFT + MOVWF PORTB + + CALL disp_delay + MOVLW 0x0B + MOVWF SHIFT + MOVWF PORTB + + CALL disp_delay + MOVLW 0x07 + MOVWF SHIFT + MOVWF PORTB + + CALL disp_delay + GOTO LOOP + +ISR: + BTFSS INTCON, RBIF + RETFIE + + MOVF PORTB, W + NOP + ANDLW 0xf0 + MOVWF COL + SWAPF COL + SUBLW 0xf0 + BTFSC STATUS, Z + GOTO ret + CALL decode + MOVWF TEMP + CALL sevensw + MOVWF PORTD + CALL SDelay + CALL SDelay + CALL SDelay + CALL SDelay + CALL SDelay +ret: + BCF INTCON, RBIF + RETFIE + + +decode: + BTFSC SHIFT, 0 ; Check if row 1 is active + GOTO col1 + BTFSS COL, 0 ; Check every column + RETLW 0x01 + BTFSS COL, 1 + RETLW 0x02 + BTFSS COL, 2 + RETLW 0x03 + BTFSS COL, 3 + RETLW 0x0A +col1: + BTFSC SHIFT, 1 + GOTO col2 + BTFSS COL, 0 ; Check every column + RETLW 0x04 + BTFSS COL, 1 + RETLW 0x05 + BTFSS COL, 2 + RETLW 0x06 + BTFSS COL, 3 + RETLW 0x0B +col2: + BTFSC SHIFT, 2 + GOTO col3 + BTFSS COL, 0 ; Check every column + RETLW 0x07 + BTFSS COL, 1 + RETLW 0x08 + BTFSS COL, 2 + RETLW 0x09 + BTFSS COL, 3 + RETLW 0x0C +col3 + BTFSC SHIFT, 3 + RETLW 0x00 + BTFSS COL, 0 ; Check every column + RETLW 0x00 + BTFSS COL, 1 + RETLW 0x00 + BTFSS COL, 2 + RETLW 0x00 + BTFSS COL, 3 + RETLW 0x0D + RETLW 0x00 + + +SDelay: + MOVLW D'250' + MOVWF R4 +SDelay_Outer: + MOVLW D'250' + MOVWF R5 +SDelay_Inner: + NOP + NOP + DECFSZ R5, F ; Decrement inner loop counter + GOTO SDelay_Inner ; Repeat inner loop + DECFSZ R4, F ; Decrement outer loop counter + GOTO SDelay_Outer ; Repeat outer loop + RETURN ; Return from delay + +disp_delay: + movlw D'250' + movwf R3 +disp_delay_inner: + NOP + NOP + NOP + NOP + decfsz R3, F + goto disp_delay_inner + return + +sevensw: + movlw high(sevenjmp) + movwf PCLATH + movf TEMP, W + addwf TEMP, W + addlw low(sevenjmp) + btfsc STATUS, 0 + incf PCLATH, 1 + movwf PCL +sevenjmp: + retlw 3Fh + retlw 06h + retlw 5Bh + retlw 4Fh + retlw 66h + retlw 6Dh + retlw 7Dh + retlw 07h ; siete + retlw 7Fh ; ocho + retlw 6Fh ; nueve + retlw 77h ; A + retlw 7Ch ; B + retlw 39h ; C + retlw 5Eh ; D + retlw 79h ; E + retlw 71h ; F + + END diff --git a/keypad/main.hex b/keypad/main.hex new file mode 100755 index 0000000..800cf76 --- /dev/null +++ b/keypad/main.hex @@ -0,0 +1,28 @@ +:020000040000FA +:0400000006EF00F017 +:0800080030EF00F08A6AF00EEF +:10001000936E0F0EC16E956A8C6A966A8D6A84849F +:10002000386A396A3B6A3A6AD08EF28EF28CF2866E +:10003000F19EF1800E0E3B6E816E86EC00F00D0E8F +:100040003B6E816E86EC00F00B0E3B6E816E86EC93 +:1000500000F0070E3B6E816E86EC00F01AEF00F0A8 +:10006000F2A0100081500000F00B396E393AF00810 +:10007000D8B44BEF00F04DEC00F0386E90EC00F08F +:10008000836E79EC00F079EC00F079EC00F079EC1B +:1000900000F079EC00F0F29010003BB058EF00F067 +:1000A00039A0010C39A2020C39A4030C39A60A0CA0 +:1000B0003BB263EF00F039A0040C39A2050C39A45F +:1000C000060C39A60B0C3BB46EEF00F039A0070C00 +:1000D00039A2080C39A4090C39A60C0C3BB6000C4B +:1000E00039A0000C39A2000C39A4000C39A60D0C63 +:1000F000000CFA0E256EFA0E266E00000000262E69 +:100100007DEF00F0252E7BEF00F01200FA0E246E3A +:100110000000000000000000242E88EF00F0120014 +:10012000010EFA6E38503824300FD8B0FA2AF96E22 +:100130003F0C060C5B0C4F0C660C6D0C7D0C070C19 +:100140007F0C6F0C770C7C0C390C5E0C790C710CED +:020000040030CA +:04000000000C1F1EB3 +:02000500038175 +:060008000FC00FE00F40E5 +:00000001FF diff --git a/keypad/main.sync-conflict-20250319-154528-N4N5JQ7.asm b/keypad/main.sync-conflict-20250319-154528-N4N5JQ7.asm new file mode 100755 index 0000000..3bef196 --- /dev/null +++ b/keypad/main.sync-conflict-20250319-154528-N4N5JQ7.asm @@ -0,0 +1,200 @@ + LIST P=18F4550 + #include + + CONFIG FOSC = HS ; Use internal oscillator, RA6 as clock output + CONFIG WDT = OFF ; Watchdog Timer off + CONFIG LVP = OFF ; Low-Voltage Programming off + CONFIG MCLRE = OFF ; MCLR pin disabled, RE3 input enabled + +; Definitions +R3 EQU 0x024 +R4 EQU 0x025 +R5 EQU 0x026 +TEMP EQU 0x038 +COL EQU 0x039 +READ EQU 0x03A +SHIFT EQU 0x03B + + ORG 0x00 + GOTO INIT + + ORG 0x08 + GOTO ISR + +INIT: + CLRF LATB + movlw 0xf0 ; PORTB setup + MOVWF TRISB + + movlw 0x0f + movwf ADCON1 + + clrf TRISD ; Set port D as output + clrf LATD + CLRF TRISE + CLRF LATE + + BSF PORTE, 2 + CLRF TEMP + CLRF COL + CLRF SHIFT + CLRF READ + + ; Configure interrupts + BSF RCON, IPEN + BSF INTCON, GIE ; Enable Global Interrupts + BSF INTCON, PEIE ; Enable Peripheral Interrupts + BSF INTCON, RBIE ; Enable RB Port Change Interrupt + BCF INTCON2, RBPU ; Enable PORTB pull-ups + BSF INTCON2, RBIP ; Set interrupt on high priority RBIP + +LOOP: + MOVLW 0x0E + MOVWF SHIFT + MOVWF PORTB + + CALL disp_delay + MOVLW 0x0D + MOVWF SHIFT + MOVWF PORTB + + CALL disp_delay + MOVLW 0x0B + MOVWF SHIFT + MOVWF PORTB + + CALL disp_delay + MOVLW 0x07 + MOVWF SHIFT + MOVWF PORTB + + CALL disp_delay + GOTO LOOP + +ISR: + BTFSS INTCON, RBIF + RETFIE + + MOVF PORTB, W + NOP + ANDLW 0xf0 + MOVWF COL + SWAPF COL + CPFSEQ READ + CALL decode + MOVWF TEMP + CALL sevensw + MOVWF PORTD + CALL SDelay + CALL SDelay + CALL SDelay + CALL SDelay + CALL SDelay + + BCF INTCON, RBIF + RETFIE + +display: + +decode: + BTFSC SHIFT, 0 ; Check if row 1 is active + GOTO col1 + BTFSS COL, 0 ; Check every column + RETLW 0x01 + BTFSS COL, 1 + RETLW 0x02 + BTFSS COL, 2 + RETLW 0x03 + BTFSS COL, 3 + RETLW 0x0A +col1: + BTFSC SHIFT, 1 + GOTO col2 + BTFSS COL, 0 ; Check every column + RETLW 0x04 + BTFSS COL, 1 + RETLW 0x05 + BTFSS COL, 2 + RETLW 0x06 + BTFSS COL, 3 + RETLW 0x0B +col2: + BTFSC SHIFT, 2 + GOTO col3 + BTFSS COL, 0 ; Check every column + RETLW 0x07 + BTFSS COL, 1 + RETLW 0x08 + BTFSS COL, 2 + RETLW 0x09 + BTFSS COL, 3 + RETLW 0x0C +col3 + BTFSC SHIFT, 3 + RETLW 0x00 + BTFSS COL, 0 ; Check every column + RETLW 0x00 + BTFSS COL, 1 + RETLW 0x00 + BTFSS COL, 2 + RETLW 0x00 + BTFSS COL, 3 + RETLW 0x0D + RETLW 0x00 + + +SDelay: + MOVLW D'250' + MOVWF R4 +SDelay_Outer: + MOVLW D'250' + MOVWF R5 +SDelay_Inner: + NOP + NOP + DECFSZ R5, F ; Decrement inner loop counter + GOTO SDelay_Inner ; Repeat inner loop + DECFSZ R4, F ; Decrement outer loop counter + GOTO SDelay_Outer ; Repeat outer loop + RETURN ; Return from delay + +disp_delay: + movlw D'250' + movwf R3 +disp_delay_inner: + NOP + NOP + NOP + NOP + decfsz R3, F + goto disp_delay_inner + return + +sevensw: + movlw high(sevenjmp) + movwf PCLATH + movf TEMP, W + addwf TEMP, W + addlw low(sevenjmp) + btfsc STATUS, 0 + incf PCLATH, 1 + movwf PCL +sevenjmp: + retlw 3Fh + retlw 06h + retlw 5Bh + retlw 4Fh + retlw 66h + retlw 6Dh + retlw 7Dh + retlw 07h ; siete + retlw 7Fh ; ocho + retlw 6Fh ; nueve + retlw 77h ; A + retlw 7Ch ; B + retlw 39h ; C + retlw 5Eh ; D + retlw 79h ; E + retlw 71h ; F + + END diff --git a/keypad/main.sync-conflict-20250319-154528-N4N5JQ7.hex b/keypad/main.sync-conflict-20250319-154528-N4N5JQ7.hex new file mode 100755 index 0000000..19e76a2 --- /dev/null +++ b/keypad/main.sync-conflict-20250319-154528-N4N5JQ7.hex @@ -0,0 +1,28 @@ +:020000040000FA +:0400000006EF00F017 +:0800080030EF00F08A6AF00EEF +:10001000936E0F0EC16E956A8C6A966A8D6A84849F +:10002000386A396A3B6A3A6AD08EF28EF28CF2866E +:10003000F19EF1800E0E3B6E816E83EC00F00D0E92 +:100040003B6E816E83EC00F00B0E3B6E816E83EC99 +:1000500000F0070E3B6E816E83EC00F01AEF00F0AB +:10006000F2A0100081500000F00B396E393A3A626C +:100070004AEC00F0386E8DEC00F0836E76EC00F008 +:1000800076EC00F076EC00F076EC00F076EC00F028 +:10009000F29010003BB055EF00F039A0010C39A2EE +:1000A000020C39A4030C39A60A0C3BB260EF00F035 +:1000B00039A0040C39A2050C39A4060C39A60B0C86 +:1000C0003BB46BEF00F039A0070C39A2080C39A43F +:1000D000090C39A60C0C3BB6000C39A0000C39A257 +:1000E000000C39A4000C39A60D0C000CFA0E256E7C +:1000F000FA0E266E00000000262E7AEF00F0252E64 +:1001000078EF00F01200FA0E246E000000000000EC +:100110000000242E85EF00F01200010EFA6E385018 +:1001200038242A0FD8B0FA2AF96E3F0C060C5B0C63 +:100130004F0C660C6D0C7D0C070C7F0C6F0C770C54 +:0A0140007C0C390C5E0C790C710C7C +:020000040030CA +:04000000000C1F1EB3 +:02000500038175 +:060008000FC00FE00F40E5 +:00000001FF diff --git a/keypad/main.sync-conflict-20250319-155715-N4N5JQ7.asm b/keypad/main.sync-conflict-20250319-155715-N4N5JQ7.asm new file mode 100755 index 0000000..3bef196 --- /dev/null +++ b/keypad/main.sync-conflict-20250319-155715-N4N5JQ7.asm @@ -0,0 +1,200 @@ + LIST P=18F4550 + #include + + CONFIG FOSC = HS ; Use internal oscillator, RA6 as clock output + CONFIG WDT = OFF ; Watchdog Timer off + CONFIG LVP = OFF ; Low-Voltage Programming off + CONFIG MCLRE = OFF ; MCLR pin disabled, RE3 input enabled + +; Definitions +R3 EQU 0x024 +R4 EQU 0x025 +R5 EQU 0x026 +TEMP EQU 0x038 +COL EQU 0x039 +READ EQU 0x03A +SHIFT EQU 0x03B + + ORG 0x00 + GOTO INIT + + ORG 0x08 + GOTO ISR + +INIT: + CLRF LATB + movlw 0xf0 ; PORTB setup + MOVWF TRISB + + movlw 0x0f + movwf ADCON1 + + clrf TRISD ; Set port D as output + clrf LATD + CLRF TRISE + CLRF LATE + + BSF PORTE, 2 + CLRF TEMP + CLRF COL + CLRF SHIFT + CLRF READ + + ; Configure interrupts + BSF RCON, IPEN + BSF INTCON, GIE ; Enable Global Interrupts + BSF INTCON, PEIE ; Enable Peripheral Interrupts + BSF INTCON, RBIE ; Enable RB Port Change Interrupt + BCF INTCON2, RBPU ; Enable PORTB pull-ups + BSF INTCON2, RBIP ; Set interrupt on high priority RBIP + +LOOP: + MOVLW 0x0E + MOVWF SHIFT + MOVWF PORTB + + CALL disp_delay + MOVLW 0x0D + MOVWF SHIFT + MOVWF PORTB + + CALL disp_delay + MOVLW 0x0B + MOVWF SHIFT + MOVWF PORTB + + CALL disp_delay + MOVLW 0x07 + MOVWF SHIFT + MOVWF PORTB + + CALL disp_delay + GOTO LOOP + +ISR: + BTFSS INTCON, RBIF + RETFIE + + MOVF PORTB, W + NOP + ANDLW 0xf0 + MOVWF COL + SWAPF COL + CPFSEQ READ + CALL decode + MOVWF TEMP + CALL sevensw + MOVWF PORTD + CALL SDelay + CALL SDelay + CALL SDelay + CALL SDelay + CALL SDelay + + BCF INTCON, RBIF + RETFIE + +display: + +decode: + BTFSC SHIFT, 0 ; Check if row 1 is active + GOTO col1 + BTFSS COL, 0 ; Check every column + RETLW 0x01 + BTFSS COL, 1 + RETLW 0x02 + BTFSS COL, 2 + RETLW 0x03 + BTFSS COL, 3 + RETLW 0x0A +col1: + BTFSC SHIFT, 1 + GOTO col2 + BTFSS COL, 0 ; Check every column + RETLW 0x04 + BTFSS COL, 1 + RETLW 0x05 + BTFSS COL, 2 + RETLW 0x06 + BTFSS COL, 3 + RETLW 0x0B +col2: + BTFSC SHIFT, 2 + GOTO col3 + BTFSS COL, 0 ; Check every column + RETLW 0x07 + BTFSS COL, 1 + RETLW 0x08 + BTFSS COL, 2 + RETLW 0x09 + BTFSS COL, 3 + RETLW 0x0C +col3 + BTFSC SHIFT, 3 + RETLW 0x00 + BTFSS COL, 0 ; Check every column + RETLW 0x00 + BTFSS COL, 1 + RETLW 0x00 + BTFSS COL, 2 + RETLW 0x00 + BTFSS COL, 3 + RETLW 0x0D + RETLW 0x00 + + +SDelay: + MOVLW D'250' + MOVWF R4 +SDelay_Outer: + MOVLW D'250' + MOVWF R5 +SDelay_Inner: + NOP + NOP + DECFSZ R5, F ; Decrement inner loop counter + GOTO SDelay_Inner ; Repeat inner loop + DECFSZ R4, F ; Decrement outer loop counter + GOTO SDelay_Outer ; Repeat outer loop + RETURN ; Return from delay + +disp_delay: + movlw D'250' + movwf R3 +disp_delay_inner: + NOP + NOP + NOP + NOP + decfsz R3, F + goto disp_delay_inner + return + +sevensw: + movlw high(sevenjmp) + movwf PCLATH + movf TEMP, W + addwf TEMP, W + addlw low(sevenjmp) + btfsc STATUS, 0 + incf PCLATH, 1 + movwf PCL +sevenjmp: + retlw 3Fh + retlw 06h + retlw 5Bh + retlw 4Fh + retlw 66h + retlw 6Dh + retlw 7Dh + retlw 07h ; siete + retlw 7Fh ; ocho + retlw 6Fh ; nueve + retlw 77h ; A + retlw 7Ch ; B + retlw 39h ; C + retlw 5Eh ; D + retlw 79h ; E + retlw 71h ; F + + END diff --git a/keypad/main.sync-conflict-20250319-155715-N4N5JQ7.hex b/keypad/main.sync-conflict-20250319-155715-N4N5JQ7.hex new file mode 100755 index 0000000..19e76a2 --- /dev/null +++ b/keypad/main.sync-conflict-20250319-155715-N4N5JQ7.hex @@ -0,0 +1,28 @@ +:020000040000FA +:0400000006EF00F017 +:0800080030EF00F08A6AF00EEF +:10001000936E0F0EC16E956A8C6A966A8D6A84849F +:10002000386A396A3B6A3A6AD08EF28EF28CF2866E +:10003000F19EF1800E0E3B6E816E83EC00F00D0E92 +:100040003B6E816E83EC00F00B0E3B6E816E83EC99 +:1000500000F0070E3B6E816E83EC00F01AEF00F0AB +:10006000F2A0100081500000F00B396E393A3A626C +:100070004AEC00F0386E8DEC00F0836E76EC00F008 +:1000800076EC00F076EC00F076EC00F076EC00F028 +:10009000F29010003BB055EF00F039A0010C39A2EE +:1000A000020C39A4030C39A60A0C3BB260EF00F035 +:1000B00039A0040C39A2050C39A4060C39A60B0C86 +:1000C0003BB46BEF00F039A0070C39A2080C39A43F +:1000D000090C39A60C0C3BB6000C39A0000C39A257 +:1000E000000C39A4000C39A60D0C000CFA0E256E7C +:1000F000FA0E266E00000000262E7AEF00F0252E64 +:1001000078EF00F01200FA0E246E000000000000EC +:100110000000242E85EF00F01200010EFA6E385018 +:1001200038242A0FD8B0FA2AF96E3F0C060C5B0C63 +:100130004F0C660C6D0C7D0C070C7F0C6F0C770C54 +:0A0140007C0C390C5E0C790C710C7C +:020000040030CA +:04000000000C1F1EB3 +:02000500038175 +:060008000FC00FE00F40E5 +:00000001FF diff --git a/test/main.asm b/test/main.asm index 3609444..de1fc2e 100755 --- a/test/main.asm +++ b/test/main.asm @@ -20,7 +20,7 @@ Start: BCF INTCON2, 7 MOVLW 0fh ; Set all pins to digital I/0 MOVWF ADCON1 - MOVLW 0xF0 + MOVLW 0xFF MOVWF TRISB CLRF LATB ;MOVLW 0x0E diff --git a/test/main.hex b/test/main.hex index c5323ca..2eab937 100755 --- a/test/main.hex +++ b/test/main.hex @@ -1,5 +1,5 @@ :020000040000FA -:10000000956A8C6AF19E0F0EC16EF00E936E8A6A2D +:10000000956A8C6AF19E0F0EC16EFF0E936E8A6A1E :0400100081CF83FF1A :020000040030CA :04000000000C1F1EB3